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%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%A

@inproceedings{agarwal+:isca00,
    author = "V. Agarwal and M. S. Hrishikesh and S. W. Keckler and D. Burger",
    title = {{Clock Rate versus IPC: The End of the Road for Conventional Microarchitectures}},
    booktitle = {ISCA},
    pages = "",
    year = "2000",
}

@CONFERENCE{akira02,
  author = {Akira Matsuzawa},
  year = {2002},
  pages = {245--253},
  title = {{RF-SoC - Expectations and Required Conditions}},
  booktitle = {IEEE Transactions on Microwave Theory and Techniques}
}

@inproceedings{albonesi+:micro99,
    author = "David H. Albonesi",
    title = "Selective Cache Ways: On-Demand Cache Resource Allocation",
    booktitle = "International Symposium on Microarchitecture",
    pages = "248-",
    year = "1999",
    url = "citeseer.nj.nec.com/article/albonesi99selective.html" }

@manual{amd02:athlon,
  title    = {{AMD} {A}thlon Processor, x86 Code Optimization Guide},
  organization = {AMD},
  location = {Sunnyvale, CA},
  year     = {2002},
  mynote     = {Athlon has four 48-bit perf counters.  Can monitor events
              according to privilege level.  Can do edge detection:
              processor counts the number of negated-to-asserted transitions
              of any condition that can be expressed by other fields.
              Has 23 events.}
}


@misc{amd:amd64,
    author        = {AMD},
    title         = {{AMD64 Technology}},
    howpublished  = {http://www.amd.com/usen/assets/content \_type/white\_papers\_and\_tech\_docs/24593.pdf},
    month         = {},
    year          = {},
    note          = {}
}

@inproceedings{anderson+:sosp97,
  title     = {Continuous Profiling:  Where Have All the Cycles Gone?},
  author    = {Jennifer M. Anderson and Lance M. Berc and Jeffrey Dean and Sanjay Ghemawat and Monika R. Henzinger and Shun-Tak A. Leung and Richard L. Sites and Mark T. Vandevoorde and Carl A. Waldspurger and William E. Weihl},
  booktitle = {Proceedings of the 16th ACM Symposium on Operating Systems Principles},
  month     = {October},
  year      = {1997},
  mynote      = {Works on unmodified binaries, profiling the entire system,
               including user programs, shared libraries, and kernel.
               Introduces low overhead, typically 1-3\%.  Analysis tools
               provide plausible explanations of stalls, including cache
               misses, branch mispredictions, and functional unit contention.
               Samples program counters available on Alpha processors
               and records in an on-disk database.  Alpha generates a
               high-priority interrupt after a specified number of events
               have occurred; events include cycles and cache misses.
               Consists of device driver to handle interrupts, a user-mode
               daemon that extracts data from the drivr, and a modified
               system loader.  Device driver records the process that received
               the interrupt, the PC, and the event type.  On the Alpha,
               the interrupt is delivered 6 cycles after the counter overflows.
               Sometimes lead to difficulties in correlated a IMISS

               (for example), with instruction that caused the miss.  Events
               in PALcode are attributed to instruction after PALcode, since
               this code can not be interrupted.  To allow high sampling
               rate, use careful coding of data structures to avoid cache
               misses and sample aggregation to avoid delivering every
               interrupt from driver to daemon.  Dominant components of time
               overhead:  first, servicing perf interrupts and second,
               servicing in daemon.  Perf of system heavily dependent on
               aggregation.  Given the total sampled time spent on an
               instruction, need to use heuristics to factor this time into
               average CPI and frequency.  Then use heuristic to determine
               performance culprits.}
}

@misc{anon:2003,
    TITLE = {Title Omitted},
    AUTHOR = {Author Information Omitted for Anonymity},
    HOWPUBLISHED = {Technical Report},
    MONTH = nov,
    YEAR = 2003,
}

@inproceedings{anon:workshop,
    TITLE = {Title Omitted},
    AUTHOR = {Author Information Omitted for Anonymity},
    HOWPUBLISHED = {Workshop Paper}
}

@inproceedings{anon:conference,
    TITLE = {Title Omitted},
    AUTHOR = {Author Information Omitted for Anonymity},
    HOWPUBLISHED = {Conference Paper}
}

@inproceedings{anon:journal,
    TITLE = {Title Omitted},
    AUTHOR = {Author Information Omitted for Anonymity},
    HOWPUBLISHED = {Journal Paper}
}


@misc{apart:url02,
  title         = {APART},
  howpublished  = {http://www.fz-juelich.de/apart/},
  month         = oct,
  year          = 2002,
  note          = {}
}

@misc{arm:amba,
    author        = {ARM Ltd.},
    title         = {{AMBA Specification Overview}},
    howpublished  = {http://www.arm.com/ Pro+Peripherals/AMBA},
    month         = {},
    year          = {},
    note          = {}
}

@misc{arm:920t,
    author        = {ARM Ltd.},
    title         = {{ARM920T Technical Reference Manual}},
    howpublished  = {http://www.arm.com/arm/ documentation?OpenDocument},
    month         = {},
    year          = {},
    note          = {}
}


@MISC{augmint:url02,
    AUTHOR = {{Augmint Home Page}},
    HOWPUBLISHED = {{http://iacoma.cs.uiuc.edu/augmint/}},
    YEAR = 2002}

@MISC{auslander+:personal02,
    AUTHOR = {Marc Auslander and Robert Wisniewski},
    TITLE = {Personal Communication},
    INSTITUTION = {{IBM T.J. Watson Research Center}},
    YEAR = 2002
}

@misc{AMDopteron:url02,
    author        = {{AMD Corporation}},
    title         = {AMD Athlon-64 and AMD Opteron Processor Tech Docs},
    howpublished  =
{http://www.amd.com/us-en/Processors/TechnicalResources/0,,30\_182\_739\_7203,00.html},
    month         = nov,
    year          = {2002},
    note          = {}
}

@misc{ASCIpurple:url02,
    author = {{Lawrence Livermore National Laboratory}},
    title = {The {ASCI} Purple Benchmark Codes},
    howpublished = {http://www.llnl.gov/asci/purple/benchmarks/limited/code\_list.html},
    month = oct,
    year = 2002,
}


%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%B

@inproceedings{bahar+:isca01,
  title        = {Power and Energy Reduction via Pipeline Balancing},
  author       = {R. Iris Bahar and S. Manne},
  booktitle    = {Proceedings of the International Symposium on Computer
                  Architecture (ISCA 2001)},
  month        = {July},
  year         = {2001},
  mynote         = { }
}

@techreport{bailey+:NASA95,
    author        = {D.H. Bailey and T. Harris and W.C. Saphir and R.F. Van
               der Wijngaart and A.C. Woo and and M. Yarrow},
    title         = {{The NAS parallel benchmarks 2.0}},
    institution   = {NASA Ames Research Center},
    year          = {1995},
    type          = {Report},
    number        = {NAS-95-020},
    address       = {Moffett Field, CA},
    month         =  dec,
    note          = {}
}

@inproceedings{balasubramonian+:micro00,
  title        = {{Memory Hierarchy Reconfiguration for Energy and Performance
                  in General-Purpose Processor Architectures}},
  author       = {R. Balasubramonian and D.H. Albonesi and A.
                  Buyuktosunoglu and S. Dwarkadas},
  booktitle    = MICRO00,
  month        = dec,
  year         = 2000,
  PAGES = {245-257},
  mynote         = {Configurable cache and TLB organizations driven by a
                  configuration algorithm that aims to improve performance
                  and energy efficiency.  Monitors miss rates, IPC, and branch
                  frequencies that are indicative of program phase changes.
                  Changes cache and TLB configuration.  e.g., if miss rate
                  exceeds a certain threshold, increase size of L1 cache.
                  Virtual two-level, physical one-level cache with configurable
                  sizes, associativies, and latencies within the hierarchy.
                  Size of TLB is also configurable.}
}


@INPROCEEDINGS{balasubramonian+:mwall00,
    AUTHOR = {Rajeev Balasubramonian and David H. Albonesi and Alper Buyuktosunoglu and Sandhya Dwarkadas},
    TITLE = {Dynamic Memory Hierarchy Performance Optimization},
    BOOKTITLE = {Workshop on Solving the Memory Wall Problem, held at the 27th International Symposium on Computer
         Architecture},
    MONTH = jun,
    YEAR = 2000
}

@INPROCEEDINGS{baslett+:compcon88,
    AUTHOR = {F. Baslett and T. Jermoluk and D. Solomon},
    TITLE = {{The 4D-MP Graphics Superworkstataion: Computing+Graphics= 40MIPS+40MFLOPS and 100,000 Lighted Polygons per Second}},
    BOOKTITLE = IEEE-COMPCON88,
        PAGES = {468-471},
    MONTH = February,
    YEAR = 1988
}

@ARTICLE{block:book62,
    AUTHOR = {H.D. Block},
    TITLE = {The Perceptron: A Model for Brain Functioning},
    JOURNAL = {Reviews of Modern Physics},
    VOLUME = {34},
    NUMBER = {1},
    PAGES = {123-135},
    YEAR = {1962},
}

@ARTICLE{bloom:cacm70,
    AUTHOR = {B. Bloom},
    TITLE = {Space/Time Tradeoffs in Hash Coding with Allowable Errors},
    JOURNAL = CACM,
    VOLUME = {13},
    NUMBER = {7},
    PAGES = {422-426},
    YEAR = 1970
}

@ARTICLE{bodin+ieetc97,
    author = {F. Bodin and A. Seznec},
    title = {Skewed Associativity Improves Program Performance and Enhances Predictability},
    journal = IEEE-TC,
    volume = {46},
    number = {5},
    pages = {530-544},
    year = 1997,
}

@misc{boehm+:computer00,
    author = {Barry Boehm and Victor R. Basili},
    title  = {Gaining Intellectual Control of Software Development},
    journal = {IEEE Computer},
    volume = {33},
    number = {3},
    year   = {2000},
    pages  = {27-33}
}

@inproceedings{bronevetsky+:ics03,
    author = {Greg Bronevetsky and Daniel Marques and Keshav Pingali and Paul Stodghill},
    title  = {Collective Operations in an Application-level Fault Tolerant MPI System},
        BOOKTITLE = {International Conference on Supercomputing (ICS)},
        YEAR      = 2003,
        MONTH     = jun,
        PAGES     = {234-243}
}

@inproceedings{bronevetsky+:ppopp03,
    author = {Greg Bronevetsky and Daniel Marques and Keshav Pingali and Paul Stodghill},
    title  = {Automated Application-level Checkpointing of MPI Programs},
    booktitle = {Principles and Practice of Parallel Programming (PPoPP)},
    year      = 2003,
    month     = jun,
    pages     = {84-94}
}

@INPROCEEDINGS{buck+:sc00,
  author =       {B.R. Buck and J.K. Hollingsworth},
  title =        {Using Hardware Performance Monitors to Isolate Memory
                 Bottlenecks},
  booktitle =    SUPER00,
  year =         2000,
  month = nov,
  pages =        "64-65",
  xurl =          "http://www.sc2000.org/proceedings/techpapr/papers/pap197.pdf",
}

@article{buck+:ijhpca00,
  author =       {B.R. Buck and J.K. Hollingsworth},
  title =        {An {API} for Runtime Code Patching},
  journal =      {The International Journal of High Performance
                 Computing Applications},
  volume =       14,
  number =       4,
  pages =        {317-329},
  year =         2000,
}


@TECHREPORT{burger+:tr97,
        AUTHOR = {D. Burger and T.M. Austin},
        TITLE = {{The SimpleScalar Toolset, Version 2.0}},
        INSTITUTION = {University of Wisconsin},
        NUMBER = {1342},
        MONTH = jun,
        YEAR = 1997}

@inproceedings{burrows+:asplos00,
  title     = {Efficient and Flexible Value Sampling},
  author    = {Mike Burrows and Ulfar Erlingson and Shun-Tak A. Leung and Mark T. Vandevoorde and Carl A. Waldspurger and Kevin Walker and William E. Weihl},
  booktitle = {Proceedings of the 9th International Conference on Architectural Support for Programming Languages and Operating Systems},
  month     = {November},
  year      = {2000},
  pages     = {160--167}
}

@inproceedings{burtscher+:pact03,
  title        = {Compressing Extended Program Traces Using Value Predictors},
  author       = {M. Burtscher and M. Jeeradit},
  booktitle    = PACT03,
  month        = oct,
  year         = 2003,
  pages        = {159-169},
  mynote         = {}
}

%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%C

@INPROCEEDINGS{calder+:asplos98,
        AUTHOR    = {Brad Calder and Chandra Krintz and Simmi John and Todd Austin},
        TITLE     = {Cache-Conscious Data Placement},
        BOOKTITLE = ASPLOS8,
        YEAR      = {1998},
        PAGES     = {139--149},
        MONTH     = oct
}


@MISC{calder+:url03,
    AUTHOR = {B. Calder and T. Sherwood and E. Perelman and G. Hamerley},
    TITLE = {SimPoint},
    HOWPUBLISHED = {http://www.cs.ucsd.edu/~calder/simpoint/},
    YEAR = 2003,
}

@inproceedings{canal+:micro00,
 author = {Ramon Canal and Antonio Gonzalez and James E. Smith},
 title = {Very low power pipelines using significance compression},
 booktitle = {Proceedings of the 33rd annual ACM/IEEE International Symposium on Microarchitecture},
 year = {2000},
 isbn = {1-58113-196-8},
 pages = {181--190},
 location = {Monterey, California, United States},
 doi = {http://doi.acm.org/10.1145/360128.360147},
 publisher = {ACM Press},
 }


@CONFERENCE{chandramouli+:pact01,
        AUTHOR = {Bharat Chandramouli and John B. Carter and Wilson C. Hsieh and Sally A. McKee},
        TITLE = {A Cost Framework for Evaluating Integrated Restructuring
                Optimizations},
        BOOKTITLE = PACT01,
        YEAR = 2001,
        PAGES = {98-107},
        MONTH = sep
}

@ARTICLE{chandramouli+:jilp03,
    AUTHOR = {B. Chandramouli and J.B. Carter and W.C. Hsieh and S.A. McKee},
    TITLE = {A Cost Model for Integrated Restructuring Optimizations},
    JOURNAL = {Journal of Instruction Level Parallelism},
    MONTH = {{to appear}},
    YEAR = 2003,
}


@INPROCEEDINGS{chang+:islped03,
        AUTHOR    = {Yen-Jen Chang and Chia-Lin Yang and Feipei Lai},
        TITLE     = {{A Power-Aware SWDR Cell for Reducing Cache Write Power}},
        BOOKTITLE = ISLPED03,
        YEAR      = {2003},
        PAGES     = {14--17},
        MONTH     = {August}
}


@INPROCEEDINGS{chang+:isca97,
    AUTHOR = {P. Chang and E. Hao and Y.N. Patt},
    TITLE = {Predicting Indirect Jumps Using a Target Cache},
    BOOKTITLE = ISCA97,
    MONTH = jun,
    PAGES = {274-283},
    YEAR = 1997,
}



@INPROCEEDINGS{chatterjee+:pldi01,
        AUTHOR    = {Siddhartha Chatterjee and Erin Parker and Philip J. Hanlon and Alvin R. Lebeck},
        TITLE     = {Exact Analysis of the Cache Behavior of Nested Loops},
        BOOKTITLE = {PLDI01},
        YEAR      = 2001,
        PAGES     = {286-297},
        MONTH     = jun,
        ABSTRACT  = {Proposes an analytical alternative to cache miss
                     equations (CMEs) and an alternative to the 3C
                     (capacity, conflict, compulsory) model of cache analysis.
                     Their analytical framework uses Presburger arithmetic,
                     a subset of first-order logic on integers.  Rather than
                     the 3Cs, they characterize misses as interior or
                     boundary.  Interior misses are those misses which may
                     be determined by examining a loop in isolation.
                     Potential boundary misses are those accesses whose
                     behavior is dependent on the prior state of the cache.
                     These misses are resolved by composing program
                     fragments with the aid of a variable representing
                     the cache state.  Advantages over CMEs:  exact analysis
                     (as opposed to reuse vectors), characterization of
                     cache state, handles imperfect loop nests, uses
                     variety of array layout functions, symbolic analysis.
                     Disadvantages:  huge (super-exponential) worst-case
                     behavior.}
}

@INPROCEEDINGS{chaudhuri+:pdpta02,
    AUTHOR = {M. Chaudhuri and D. Kim and M. Heinrich},
    TITLE = {Cache Coherence Protocol Design for Active Memory Systems},
    BOOKTITLE = {{Proceedings of the International Conference on Parallel and
       Distributed Processing Techniques and Applications}},
    PAGES = {83-89},
    MONTH = jun,
    YEAR = 2002
}

@inproceedings{chi+:barc03,
  title        = {Combining Software and Hardware Monitoring for Improved Power
                  and Performance Tuning},
  author       = {Eric Chi and Michael Salem and Iris Bahar and Richard Weiss},
  booktitle    = {Boston Area Architecture Workshop (BARC) 2003},
  month        = {June},
  year         = {2003},
  mynote         = {Monitors hardware counters during a fixed-sized sample
                  window.  Uses software profiling and hardware monitoring.
                  Profiling annotates code blocks with low IPC, directing the
                  CPU to enter a low power state.  But, profiling only handles
                  static instructions, so only instructions or subroutines
                  with deterministic behavior can be used to signal a
                  reconfiguration.  Therefore, also monitor IPC dynamically
                  in hardware.  Drop in IPC means we can reduce issue width
                  and number of functional units without effecting
                  performance.}
}

@INPROCEEDINGS{chilimbi+:iccp94,
    AUTHOR = {T. Chilimbi and J. Larus},
    TITLE = {Cashier: A Tool for Automatically Inserting {CICO} Annotations},
    BOOKTITLE = ICPP94,
    MONTH = aug,
    YEAR = 1994
}

%% might be incorrect citation -- can't verify w/ citeseer or DAC
@INPROCEEDINGS{chiou+:dac00,
    AUTHOR = {D. Chiou and P. Jain and S. Devadas and L. Rudolph},
    TITLE = {Dynamic Cache Partitioning via Columnization},
    BOOKTITLE = DAC00,
    xLOCATION = {Los Angeles, {CA}},
    MONTH = jun,
    YEAR = 2000,
    url = {citeseer.nj.nec.com/chiou00dynamic.html},
}

@TECHREPORT{chiou+:tr430_99,
    AUTHOR = {D. Chiou and P. Jain and S. Devadas and L. Rudolph},
    TITLE = {Dynamic Cache Partitioning via Columnization},
    INSTITUTION = {MIT Laboratory for Computer Science Computation Structures Group},
    NUMBER = {Memo 430},
    MONTH = nov,
    YEAR = 1999,
    url = {citeseer.nj.nec.com/chiou00dynamic.html},
}

@inproceedings{chiou00+:fsv00,
    AUTHOR = {D. Chiou and P. Jain and S. Devadas and L. Rudolph},
    TITLE = {Application-Specific Memory Management for Embedded Systems
    Using Software-Controlled Caches},
    BOOKTITLE = DAC00,
    PAGES = {416-419},
    MONTH = jun,
    YEAR = 2000,
    url = {citeseer.nj.nec.com/chiou99applicationspecific.html} }

@TECHREPORT{chiou+:tr427_00,
    AUTHOR = {D. Chiou and P. Jain and L. Rudolph and S. Devadas},
    TITLE = {Application-Specific Memory Management for Embedded Systems Using Software-Controlled Caches},
    INSTITUTION = {MIT Laboratory for Computer Science Computation Structures Group},
    NUMBER = {Memo 427},
    MONTH = oct,
    YEAR = 1999
}

@manual{compaq:alpha21264,
  title        = {Alpha 21264 Microprocessor Hardware Reference Manual},
  organization = {Compaq Computer},
  location     = {Houston, Texas},
  mynote       = {The 21264 offers two methods of obtaining performance
                feedback information:  traditional performance counters
                (Aggregate mode) and ProfileMe.  Two counters may be
                active simultaneously.
                Aggregate mode counts events until it overflows, causing
                an interrupt that can retrieve the collected data.
                Aggregate mode can count cycles, the number of instructions
                retired by cycle, the number of Bcache misses, and
                Mbox replay traps.
                ProfileMe statistically samples individual instructions
                and counts events triggered by a targeted inflight instruction.
                ProfileMe can determine if the targeted instruction:
                was in a new Icache fill stream, caused a trap,
                was a mispredicted conditional branch, retired valid,
                stalled for at least one cycle between fetch and map
                stages of the pipeline, or was killed during or before
                the cycle in which it was mapped.}
}



@article{716997,
 author = {Mihir Bellare and Chanathip Namprempre},
 title = {{Authenticated Encryption: Relations among Notions and Analysis of the Generic Composition Paradigm}},
 journal = {In Advances in Cryptology --- Asiacrypt 2000 Proceedings, Lecture Notes in Computer Science},
 year = {2000},
 volume = {1976},
 isbn = {3-540-41404-5},
 publisher = {Springer-Verlag},
 }



@INPROCEEDINGS{cong+:iccad03,
        AUTHOR    = {J. Cong and Y. Fan and G. Han and X. Yang and Z. Zhang},
        TITLE     = {{Architectural Synthesis Integrated with Global Placement for Multi-Cycle Communication}},
        BOOKTITLE = {ICCAD},
        YEAR      = {2003}
}

@INPROCEEDINGS{cong+:dac03,
        AUTHOR    = {J. Cong and A. Jagannathan and G. Reinman and M. Romesis},
        TITLE     = {{Microarchitecture Evaluation with Physical Planning}},
        BOOKTITLE = {DAC},
        YEAR      = {2003}
}




@INPROCEEDINGS{corliss+:isca03,
       AUTHOR    = {Marc L. Corliss and E. Christopher Lewis and Amir Roth},
       TITLE     = {DISE:  A Programmable Macro Engine for Customizing Applications},
       BOOKTITLE = ISCA03,
       PAGES     = {362--373},
       YEAR      = 2003,
       MONTH     = jun
}

@misc{crossgrid:url03,
  title         = {Crossgrid},
  howpublished  = {http://www.crossgrid.org/},
  month         = feb,
  year          = 2003,
  note          = {}
}

@INBOOK{culler+:book94,
    AUTHOR = {David E. Culler and Jaswinder Pal Singh and Anoop Gupta},
    TITLE = {{Parallel Computer Architecture: A Hardware/Software Approach}},
    YEAR = 1999,
    PUBLISHER = {Morgan Kaufmann Publishers, Inc.},
}

%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%D

@MISC{dally+:url03,
    AUTHOR = {{Merrimac Project}},
    TITLE = {Stanford Streaming Supercomputer Project},
    HOWPUBLISHED = {http://merrimac.stanford.edu/resources.html},
    YEAR = 2003,
}

@article{davis+:ieee01,
      author = {J. A. Davis and R. Venkatesan and A. Kaloyeros and M. Beylansky and S. J. Souri and K. Banerjee and K. C. SARASWAT and A. Rahman and R. REIF and J D. Meindl},
      title = {{Interconnect Limits on Gigascale Integration (GSI) in the 21st Century}},
      journal = {Proceedings of the IEEE},
      volume = {},
      number = {},
      pages = {},
      year = 2001
}

@inproceedings{dean+:microarch97,
  title     = {ProfileMe:  Hardware Support for Instruction-Level Profiling on Out-of-Order Processors},
  author    = {Jeffrey Dean and James E. Hicks and Carl A. Waldspurger and William E. Weihl and George Chrysos},
  booktitle = {Proceedings of the 30th Symposium on Microarchitecture},
  location  = {Los Alamitos, CA},
  year      = {1997},
  pages     = {292--302}
}

@manual{dec:atom,
  title        = {ATOM User Manual},
  organization = {Digital Equipment Corporation},
  year         = {1994},
  month        = mar,
}

@INPROCEEDINGS{derose+:sc02,
  author =       {L. DeRose and K. Ekanadham and J. Hollingsworth and S. Sbaraglia},
  title =        {{SIGMA: A Simulator Infrastructure to Guide Memory Analysis}},
  booktitle =    SUPER02,
  year =         2002,
  month = nov
}

@INPROCEEDINGS{desikan+:isca01,
    TITLE = {{Measuring Experimental Error in Multiprocessor Simulation}},
    AUTHOR = {R. Desikan and D. Burger and S. Keckler},
    BOOKTITLE = ISCA01,
    MONTH = jun,
    YEAR = 2001,
    PAGES = {266-277},
}

@TECHREPORT{desikan+:trut01,
    AUTHOR = {R. Desikan and D. Burger and S. Keckler and T. Austin},
    TITLE = {{Sim-alpha: a Validated, Execution-Driven Alpha 21264 Simulator}},
    INSTITUTION = {Department of Computer Sciences, The University of Texas at Austin},
    NUMBER = {TR-01-23},
    YEAR = 2001}

@MISC{desupinski:personal01,
    AUTHOR = {B.R. de Supinski},
    TITLE = {Personal Communication},
    INSTITUTION = {Lawrence Livermore National Laboratory},
    YEAR = 2001
}

@INPROCEEDINGS{ding+:pldi99,
        AUTHOR    = {Chen Ding and Ken Kennedy},
        TITLE     = {Improving Cache Performance in Dynamic Applications through Data and Computation Reorganization at Run Time},
        BOOKTITLE = PLDI99,
        YEAR      = 1999,
        MONTH     = may,
        ABSTRACT  = {Builds on inspector-executor method to optimize
                     irregular apps, in which layout and accesses are
                     unknown until runtime and may change dynamically.
                     ("Unpredictable nature of reuse prevents static
                     analysis"; but reuse is not unpredictable, it's
                     driven by physics.  Can we exploit a domain expert's
                     knowledge during compilation-- e.g., overriding
                     conservative alias analysis.)  Locality group
                     improves temporal locality by reordering access
                     sequence so all interactions are clustered.
                     Compiler can automate via sort of interactions
                     (2-tuples).  Dynamic data packing groups data
                     accessed at close intervals into same cache line.
                     First-touch packing iterates through access list
                     and packs unpacked data in next contiguous slot.
                     Group packing takes reuse into account; groups
                     access according to similar reuse distance and uses
                     first-touch within group.  Compiler supports
                     dynamic data packing through indirection map.
                     Can guarantee correctness but relies on user directive
                     to guide profitability of applying packing.  Cost
                     is data reorganization and data redirection during
                     access.  How to adjust frequency of repacking?
                     (Based on physics?  e.g., short mean free path
                     leads to many collisions which should localize
                     particles, thus less need to reorganize because
                     same particles continually interact.)  Authors
                     ameliorate overhead via pointer update and
                     array alignment.  Discusses extensions to automate
                     profitability analysis of packing:  monitor
                     access to see if non-contiguous and repacking would
                     help; frequency of repacking determined by
                     average data distance (overhead?  ask a physicist
                     for help as above).  Benchmarks:  moldyn, mesh, magi.
                     Locality grouping was manual; data packing automated.}
}


@inproceedings{ding+:msp02,
  title        = {Compiler-Directed Run-Time Monitoring of Program Data Access},
  author       = {Chen Ding and Yutao Zhong},
  booktitle    = {First ACM SIGPLAN Workshop on Memory System Performance (MSP)},
  month        = jun,
  year         = 2002,
  pages        = {1--12}
}

@inproceedings{dhodapkar+:isca02,
  title        = {Managing Multi-Configurable Hardware via Working Set
                  Analysis},
  author       = {Ashutosh S. Dhodapkar and James E. Smith},
  booktitle    = {Proceedings of the International Symposium on Computer
                  Architecture (ISCA 2002)},
  month        = {May},
  year         = {2002},
  mynote         = {Uses working sets to guide (re-)configuration.  Detection
                  of working set change can trigger search for optimal
                  reconfiguration.  Working set size can be used to
                  configure parameters that are sensitive to size.  Finally,
                  identification of a previously encountered working set
                  allows a previous configuration to be re-instated.
                  Small hardware table captures a working set signature--
                  compression of working set elements, cache lines in this
                  case.}
}

@misc{dolphin:url00,
  title         = {{Dolphin Interconnect --- Home Page}},
  howpublished  = {http://www.dolphinics.no/},
  month         = dec,
  year          = 2000,
  note          = {}
}

@INPROCEEDINGS{driesen+:isca98,
    AUTHOR = {K. Driesen and U. H{\"o}lzle},
    TITLE = {Accurate Indirect Branch Prediction},
    BOOKTITLE = ISCA98,
    PAGES = {167-178},
    YEAR = 1998,
    MONTH = jun,
}

@INPROCEEDINGS{driesen+:micro98,
    AUTHOR = {K. Driesen and U. H{\"o}lzle},
    TITLE = {The Cascaded Predictor: Economical and Adaptive Branch Target Prediction},
    BOOKTITLE = MICRO98,
    PAGES = {249-258},
    YEAR = 1998,
    MONTH = dec,
}

@INPROCEEDINGS{duesterwald+:pact03,
        AUTHOR    = {Evelyn Duesterwald and Calin Cascaval and Sandhya Dwarkadas},
        TITLE     = {Characterizing and Predicting Program Behavior and its Variability},
        BOOKTITLE = PACT03,
        YEAR      = 2003,
        MONTH     = sep,
        ABSTRACT  = {Predicts, rather than reacts to, application phases.
                     Rationale is that if a program is too unstable,
                     a reactive approach will thrash and lag behind
                     current behavior.  Notes that the looping structure of
                     programs is the source of periodicity, and that this
                     manifests itself in cyclic behavior across all/many
                     metrics.  e.g., shows that IPC, L1D cache misses,
                     branches per instruction, and branch mispredict
                     rate are periodic (in unison) and at different
                     granularities.  Applied Fourier analysis to show
                     periodicity.  They exploit periodicity to build
                     predictors based on history.  Because metrics tend
                     to change in unison at a phase shift, they employ
                     "asymmetric predictors" that take one metric as an
                     index and predict for multiple metrics.}
}

%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%E


@INPROCEEDINGS{eble+:asic96,
    AUTHOR = {J. C. Eble and V. K. De and D. S. Wills and J. D. Meindl},
    TITLE = {{A Generic System Simulator (GENESYS) for ASIC Technology and Architecture Beyond 2001}},
    BOOKTITLE = {Int'l ASIC Conference},
    YEAR = {1996}
}

@INPROCEEDINGS{eden+:micro98,
    AUTHOR = {A.N. Eden and T.N. Mudge},
    TITLE = {The {YAGS} Branch Prediction Scheme},
    BOOKTITLE = MICRO98,
    MONTH =  dec,
    YEAR = 1998,
    PAGES = {69-77},
}
@INPROCEEDINGS{eicken+:sosp95,
    AUTHOR = {T. v. Eicken and A. Basu and V. Buch and W. Vogels},
    TITLE = {U-Net: A User-Level Network Interface for Parallel and Distributed Computing},
    BOOKTITLE = SOSP15,
    MONTH =  dec,
    YEAR = 1995

}

@misc{embedded:none,
    author        = {Embedded.com},
    howpublished  = {http://www.embedded.com/ story/OEG20021204S0005},
    month         = {},
    year          = {},
    note          = {}
}

@INPROCEEDINGS{emer+:isca97,
    AUTHOR = {J. Emer and N. Gloy},
    TITLE = {A Language for Describing Predictors and Its Application to Automatic Synthesis},
    BOOKTITLE = ISCA97,
    MONTH = jun,
    PAGES = {304-314},
    YEAR = 1997,
}

@INPROCEEDINGS{evers+:isca98,
    AUTHOR = {M. Evers and S.J. Patel and R.S. Chappell and Y.N. Patt},
    TITLE = {An Analysis of Correlation and Predictability: What Makes Two-Level Branch Predictors Work},
    BOOKTITLE = ISCA98,
    YEAR = 1998,
    MONTH = jun,
    PAGES = {52-61},
}


%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%F
@INPROCEEDINGS{fang+:wwc02,
    AUTHOR = {Z. Fang and S.A. McKee},
    TITLE = {MPEG-4: Fallacies and Paradoxes},
    BOOKTITLE = {5th {IEEE} Workshop on Workload Characterization},
    MONTH =  nov,
    YEAR = 2002
}

@INPROCEEDINGS{fang+:ispass03,
    AUTHOR = {Z. Fang and S.A. McKee and M. Valero},
    TITLE = {An MPEG-4 Performance Study},
    BOOKTITLE = {{IEEE} International Symposium on Performance Analysis of Systems and Software},
    MONTH =  mar,
    YEAR = 2003
}

@manual{fenlason+:gprof,
  title        = {GNU gprof:  The GNU Profiler},
  author       = {Jay Fenlason and Richard Stallman},
  organization = {Free Software Foundation},
  year         = {1997},
  mynote         = {gprof wraps function calls during compilation so that the
                  jacket records caller information and number of function
                  invocations.  Also profiles pc periodically to provide
                  statistical sampling of execution time.  This is done via
                  a profil system call if available or otherwise via signals--
                  e.g., setitimer.}
}

@inproceedings{folegnani+:isca01,
  title        = {Energy-Efficient Issue Logic},
  author       = {Daniele Folegnani and Antonio Gonzalez},
  booktitle    = {Proceedings of the International Symposium on Computer
                  Architecture (ISCA 2001)},
  month        = {July},
  year         = {2001},
  mynote         = {Recognizes that instructions from "young" quarter of issue
                  queue-- i.e., most recent entries-- contribute little to
                  performance.  Therefore, adapt size of issue queue without
                  effecting IPC.  The part of issue queue not used contributes
                  to the 'empty area' where no instructions are held.
                  Increasing this reduces the wake-up power consumption because
                  the wake-up logic need not compare tags.  Issue queue
                  has tags for any operand that is not ready.  On every cycle,
                  result tag is broadcast and all entries compare with their
                  tags to find match.  Instructions are tagged if they come
                  from young part of issue queue.  When a tagged instruction
                  retires, a counter is incremented.  This counter is
                  examined every few cycles; if it does not reach a threshold,
                  the issue queue size is reduced.}
}

@INBOOK{faucett:book94,
    AUTHOR = {L. Faucett},
    TITLE = {Fundamentals of Neural Networks: Architectures, Algorithms and Applications},
    YEAR = 1994,
    PUBLISHER = {Prentice Hall, Englewood Cliffs, NJ},
}

%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%G

@conference{gerndt+:pdp02,
    author = {Michael Gerndt and Andreas Schmidt and Martin Schulz,and Roland Wism\"uller},
    title = {Perfomance Analysis of Teraflop Computers Ã?? A Distributed Automatic Approach},
    booktitle = {10th Euromicro Workshop on Parallel, Distributed, and Network Processing (PDP)},
    year = 2002,
    month  = jan}

@InProceedings{ghosh+:asplos98,
        AUTHOR    = {Somnath Ghosh and Margaret Martonosi and Sharad Malik},
        TITLE     = {Precise Miss Analysis for Program Transformations with
                     Caches of Arbitrary Associativity},
        BOOKTITLE = ASPLOS8,
        PAGES     = {228-239},
        MONTH     = oct,
        YEAR      = {1998}
}

@ARTICLE{gonzalez+:ieeetc,
    TITLE = {Control-Flow Speculation through Value Prediction},
    AUTHOR = {J. Gonz{\`a}lez and A. Gonz{\`a}lez},
    JOURNAL = IEEE-TC,
    VOLUME = 50,
    NUMBER = 12,
    PAGES = {1362-1376},
    YEAR = 2001,
    ABSTRACT = {
    In this paper, we introduce a new branch predictor that predicts the outcome of branches
    by predicting the value of their inputs and performing an early computation of their results
    according to the predicted values. The design of a hybrid predictor comprising the above
    branch predictor and a correlating branch predictor is presented. We also propose a new
    selector that chooses the most reliable prediction for each branch. This selector is based
    on the path followed to reach the branch. Results for immediate updates show significant
    misprediction rate reductions with respect to a conventional hybrid predictor for different
    size configurations. In addition, the proposed hybrid predictor with a size of 8 KB achieves
    the same accuracy as a conventional one of 64 KB. Performance evaluation for a
    dynamically scheduled superscalar processor, with realistic updates, shows a speed up
    of 8 percent despite its higher latency (up to four cycles).
    },
}

@INPROCEEDINGS{gordan:cicc99,
    AUTHOR = {B. Gordan},
    TITLE = {{An Efficient Bus Architecture for System-on-a-Chip Design}},
    BOOKTITLE = CICC,
    PAGES = {623-626},
    MONTH = May,
    YEAR = 1999
}

@article{gordian,
    AUTHOR = {J. Kleinhaus and et al.},
    TITLE = {{GORDIAN: VLSI Placement by Quadratic Programming and Slicing Optimization}},
    journal = {IEEE Tran. on CAD},
    volume = {},
    year = 1991

}


@INPROCEEDINGS{timingRBP,
    AUTHOR = {B. Halpin, C.Y.R. Chen, N. Sehgal},
    TITLE = {{Timing Driven Placement using Physical Net Constraints}},
    BOOKTITLE = {DAC01},
    YEAR = {2001}
}


@INPROCEEDINGS{gosti:iccad98,
    AUTHOR = {W. Gosti and et al.},
    TITLE = {{Wireplanning in Logic Synthesis}},
    BOOKTITLE = {ICCAD},
    YEAR = {1998}
}

%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%H

@article{hammond+:comp97,
      author = {Lance Hammond and Basem A. Nayfeh and Kunle Olukotun},
      title = {{A Single-Chip Multiprocessor}},
      journal = IEEE-COMPUTER,
      volume = {30},
      number = {9},
      pages = {79-85},
      year = 1997
}

@INPROCEEDINGS{heinrich+:ishpc02,
    AUTHOR = {M. Heinrich and E. Speight and M. Chaudhuri},
    TITLE = {{Active Memory Clusters: Efficient Multiprocessing on Commodity Clusters}},
    BOOKTITLE = {{Proceedings of the Fourth International Symposium on High-Performance Computing,
Lecture Notes in Computer Science}},
    NOTE = {vol. 2327, Springer-Verlag},
    PAGES = {78-92},
    MONTH = may,
    YEAR = 2002
}

@article{ho+:ieee01,
      author = {R. Ho and K. W. Mai and M. A. Horowitz},
      title = {{The Future of Wires}},
      journal = {Proceedings of the IEEE},
      volume = {},
      number = {},
      pages = {},
      year = 2001
}

@ARTICLE{ hochreiter97long,
    AUTHOR = {S. Hochreiter and J. Schmidhuber},
    TITLE = {Long Short-Term Memory},
    JOURNAL = {Neural Computation},
    VOLUME = 9,
    NUMBER = 8,
    PAGES = {1735-1780},
    YEAR = 1997,
}

@CONFERENCE{hong+:hpca99,
        AUTHOR = {S.I. Hong and S.A. McKee and M.H. Salinas and R.H. Klenke and J.H. Aylor and Wm.A. Wulf},
        TITLE = {Access Order and Effective Bandwidth for Streams on a Direct Rambus Memory},
        BOOKTITLE = HPCA5,
        PAGES = {80-89},
        YEAR = 1999,
        MONTH = jan}


%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%I

@misc{IBM:coreconnet,
    author = {{IBM} Corporation},
    title = {{CoreConnect Bus Architecture}},
    howpublished = {http://www.chips.ibm.com/ products/coreconnect}
}

@misc{IBM_DB2:url02,
    author = {{IBM} Corporation},
    title = {{DB2} Product Family},
    howpublished = {http://www-3.ibm.com/software/data/db2/},
    year = 2002,
}

@manual{ibm99:powerpc,
  title    = {{P}ower{PC} 740/{P}ower{PC} 750 {RISC} Microprocessor User's Manual},
  location = {White Plains, NY},
  organization = {IBM},
  year     = {1999},
  mynote     = {Utilizes a sampled instruction address register (SIA)
              to hold the effective address of an instruction executing
              "at or around" the time of a triggered event.  A perf
              monitor generates an interrupt upon counter overflow or
              when certain bits flip from 0 to 1 in the time base register.
              4 counters.  Counters are asymmetric-- i.e., can't monitor
              every event from every counter.  More than 40 unique events.}
}

@misc{IBMpower4:url02,
    author        = {{IBM} Corporation},
    title         = {{POWER4} System Microarchitecture},
    howpublished  = {http://www-1.ibm.com/servers/eserver/pseries/hardware/whitepapers/power4.html},
    month         = nov,
    year          = 2002,
    note          = {}
}

@misc{Impulse:url02,
    author  = {The Impulse Adaptable Memory System Project},
    title   = {Impulse: Building a Smarter Memory Controller},
    howpublished  = {http://www.cs.utah.edu/impulse},
    year          = 2002,
    note          = {}
}

@misc{intel:486embedded,
    author        = {Intel Corp.},
    title         = {{Embedded Intel486 Hardware Reference Manual}},
    howpublished  = {http://www.intel.com/design/intarch /manuals/273025.htm},
    month         = {},
    year          = {},
    note          = {}
}

@misc{intel:ia32archsw,
    author        = {Intel Corp.},
    title         = {{The IA32 Intel Architecture Software Developer's Manual}},
    howpublished  = {http://developer.intel.com/design/ pentium4/manuals/245472.htm},
    month         = {},
    year          = {},
    note          = {}
}


@manual{intel02:ia32,
  title    = {Intel Architecture Software Developer's Manual Volume 3:  System Programming Guide},
  year     = {2002},
  organization = {Intel},
  location = {Santa Clara, CA},
  mynote     = {Pentium 4 and Xeon:
              precise event-based sampling (PEBS).  18 perf counters.
              DS (debug store) area of saving PEBS entries.
              PEBS buffers stored in the DS save area hold the architectural
              state of the machine at the time of the event that caused
              a counter overflow.  When the state information has
              been logged, the counter is automatically reset to a
              preselected value.  They don't do aggregation as in SMiLE.
              Pentium 4 and Xeon allow monitoring
              of non-retirement events (any time in pipeline) and
              at-retirement events.  Can differentiate according to
              privilege level.
              P6 family:
              2 40-bit counters.  Can differentiate according to
              privilege level.  Can do edge detection.
              Pentium:
              2 40-bit counters.}
}

@manual{intel00:itanium,
  title    = {Intel Itanium Architecture Software Developer's Manual},
  year     = {2000},
  organization = {Intel},
  location = {Santa Clara, CA},
  mynote     = {Has 4 32-bit perf counters.  Over 90 monitorable events.
              Has a threshold capability:  the monitor is incremented
              by one in every cycle in which the observed event count
              (multi-occurence events may occur in one cycle) exceeds the
              threshold.  cycle accounting shows the distribution of time
              spent in various stall conditions (e.g., data access, branch
              mispredict).  Itanium has event address registers (EARs)
              that record instruction and data accesses of cache misses
              for loads, data TLB misses, and i-TLB and cache misses.
              Can interrupt the processor after a pre-defined number of
              events have been observed.  Perf monitoring can be
              confined to a subset of events:  instrs within an address
              range, with a certain opcode, within a data address range, or
              at a privelege level.  Counters are asymmetric and can
              generate an interrupt.}
}

@article{itzkovitz+:jss00,
      author = {Ayal Itzkovitz and Nitzan Niv and Assaf Schuster},
      title = {{Dynamic adaptation of sharing granularity in DSM systems}},
      journal = {The Journal of Systems and Software},
      volume = {55},
      number = {1},
      pages = {19-32},
      year = 2000
}

%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%J

@INPROCEEDINGS{jain+:iccad01,
    AUTHOR = {Prabhat Jain and Srinivas Devadas and Daniel W. Engels and Larry Rudolph},
    TITLE = {{Software-Assisted Cache Replacement Mechanisms for Embedded Systems}},
    BOOKTITLE = {{International Conference on Computer Aided Design}},
    PAGES = {119-126},
    MONTH = nov,
    YEAR = 2001
}

@INPROCEEDINGS{jimenez:hpca03,
    AUTHOR = {D. Jim{\'e}nez},
    TITLE = {Reconsidering Complex Branch Predictors},
    BOOKTITLE = HPCA03,
    PAGES = {43-52},
    MONTH = feb,
    YEAR = 2003
}

@INPROCEEDINGS{jimenez+:ijcnn01,
    AUTHOR = {D. Jim{\'e}nez and C. Lin},
    TITLE = {Perceptron Learning for Predicting the Behavior of Conditional Branches},
    BOOKTITLE = {Proceedings of the International Joint Conference on Neural Networks},
    MONTH = jul,
    YEAR = 2001,
    PAGES = {2122-2126}
}

@ARTICLE{jimenez+:tocs02,
    AUTHOR = {D. Jim{\'e}nez and C. Lin},
    TITLE = {Neural Methods for Dynamic Branch Prediction},
    JOURNAL = ACM-TOCS,
    VOLUME = 20,
    NUMBER = 4,
    PAGES = {369-397},
    YEAR = 2002,
}

@TECHREPORT{jimenez+:tr01,
    AUTHOR = {D. Jim{\'e}nez and C. Lin},
    TITLE = {Neural Methods for Dynamic Branch Prediction},
    INSTITUTION = {University of Texas at Austin Department of Computer Science},
    NUMBER = {Technical Report 1554},
    howpublished  = {{http://camino.rutgers.edu/perceptron.pdf}},
    MONTH = dec,
    NUMBER = {Technical Report TR-01-50},
    YEAR = 2001,
}

@INPROCEEDINGS{jimenez+:hpca01,
    AUTHOR = {D. Jim{\'e}nez and C. Lin},
    TITLE = {Dynamic Branch Prediction with Perceptrons},
    BOOKTITLE = HPCA01,
    PAGES = {197-206},
    MONTH = jan,
    YEAR = 2001
}

@INPROCEEDINGS{jimenez+:micro00,
        AUTHOR = {D. Jim{\'e}nez and S.W. Keckler and C. Lin},
        TITLE = {The Impact of Delay on the Design of Branch Predictors},
        BOOKTITLE = MICRO00,
        MONTH = dec,
        PAGES = {67-76},
        YEAR = 2000,
}



%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%K

@INPROCEEDINGS{kampe+:hpca02,
    AUTHOR = {Martin Kampe and Per Stenstr\"om and Michael Dubois},
    TITLE = {The {FAB} Predictor:  Using Fourier Analysis to Predict
             the Outcome of Conditional Branches},
    BOOKTITLE = HPCA02,
    PAGES = {223-232},
    MONTH = feb,
    YEAR = 2002,
    ABSTRACT = {Shows that some SPEC95 benchmarks exhibit correlated
                branch behavior that requires too much history to
                recognize given the size constraints of current
                dynamic approaches.  This paper suggests using Fourier
                analysis to capture this behavior without the
                associated history register footprint.  It adapts
                the Fourier technique of Voldman and Hoevel, but
                provides a more intuitive explanation.  See that paper
                abstract for a description.  This paper also describes
                a hardware implementation.  The conclusion suggests the
                applicability of Fourier analysis to detecting memory
                access patterns.}
}

@inproceedings{karl+:pact99,
  author    = {W. Karl and M. Leberecht and M. Schulz},
  title     = {{Optimizing Data Locality for SCI--based
          PC--Clusters with the SMiLE Monitoring Approach}},
  booktitle = {Proceedings of International Conference on Parallel Architectures and Compilation Techniques (PACT)},
  year      = {1999},
  editor    = {},
  volume    = {},
  number    = {},
  series    = {},
  pages     = {169--176},
  address   = {},
  month     = oct,
  organization  = {},
  publisher = {},
  note      = {}
}
@ARTICLE{katayama+:2001,
    AUTHOR = {K. Katayama and S. Toda and K. Nakamura and Y. Fuse and H. Ando and T. Shimada},
    TITLE = {A Branch Prediction Mechanism via Value Prediction},
    JOURNAL = {{IPSJ} Transactions on High Performance Computing Systems},
    NUMBER = {{SIG}12-003},
    VOLUME = 42,
    xPAGES = {},
    YEAR = 2001,
}


@INPROCEEDINGS{kim+:wmpi02,
    AUTHOR = {Nam Sung Kimh and Todd M. Austin and Trevor N. Mudge},
    TITLE = {{Low-Energy Data Cache Using Sign Compression and Cache Line Bisection}},
    BOOKTITLE = {2nd Annual Workshop on Memory Performance Issues},
    YEAR = 2002,
}

@INPROCEEDINGS{kim+:ipdps02,
    AUTHOR = {D. Kim and M. Chaudhuri and M. Heinrich},
    TITLE = {{Active Memory Techniques for ccNUMA Multiprocessors}},
    BOOKTITLE = IPDPS02,
    PAGES = {10},
    MONTH = oct,
    YEAR = 2002,
    NOTE = {to appear}
}

@INPROCEEDINGS{kim+:ics02,
    AUTHOR = {D. Kim and M. Chaudhuri and M. Heinrich},
    TITLE = {{Leveraging Cache Coherence in Active Memory Systems}},
    BOOKTITLE = ICS02,
    PAGES = {2-13},
    MONTH = jun,
    YEAR = 2002
}

@ARTICLE{kodukula+:jpp01,
        AUTHOR = {Induprakas Kodukula and Keshav Pingali},
        TITLE  = {Data-Centric Transformations for Locality Enhancement},
        BOOKTITLE = {International Journal of Parallel Programming},
        MONTH  = oct,
        YEAR   = 2001
}

@MISC{kleinosowski+:url00,
    TITLE = {{MinneSPEC}: A New {SPEC} Benchmark Workload for Simulation-Based Computer
        Architecture Research},
    AUTHOR = {AJ KleinOsowski and D. Lilja},
    HOWPUBLISHED = {http://www.arctic.umn.edu/~lilja/papers/minnespec-cal-v2.pdf},
    YEAR = 2000,
}

%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%L

@INPROCEEDINGS{lai+:isca2000,
    AUTHOR = {A. Lai and B. Falsafi},
    TITLE = {Selective, Accurate, and Timely Self-Invalidation Using Last Touch Prediction},
    BOOKTITLE = ISCA00,
    MONTH = jun,
    YEAR = 2000
}



@misc{arm:920t,
    author        = {ARM Ltd.},
    title         = {{ARM920T Technical Reference Manual}},
    howpublished  = {http://www.arm.com/arm/ documentation?OpenDocument},
    month         = {},
    year          = {},
    note          = {}
}


@MISC{lawton,
    AUTHOR = {{K. Lawton}},
        TITLE = {{Welcome to the Bochs x86 PC Emulation Software Home Page}},
    HOWPUBLISHED = {{http://www.bochs.com}}
}

@inproceedings{lebeck+:asplos00,
    author = {Alvin R. Lebeck and Xiaobo Fan and Heng Zeng and Carla S. Ellis},
    title  = {Power Aware Page Allocation},
    booktitle = {Proceedings of ASPLOS IX},
    month  = {November},
    year   = {2000}
}

@INPROCEEDINGS{lee+:hpca01,
    AUTHOR = {H. Lee and M. Smelyanski and C. Newburn and G.S. Tyson},
    TITLE = {Stack Value File: Custom Microarchitecture for the Stack},
    BOOKTITLE = HPCA01,
    MONTH = jan,
    YEAR = 2001,
    PAGES = {5-14},
}

@inproceedings{liao+:sigmetrics98,
  title        = {Performance Monitoring in a Myrinet-Connected Shrimp Cluster},
  author       = {Cheng Liao and Margaret Martonosi and Douglas W. Clark},
  booktitle    = SIGMETRICS98,
  month        = {August},
  year         = {1998},
  mynote         = {Embeds perf monitoring code into the message
                  sending/receiving firmware running on the LANai processor
                  in the Myrinet Network Interface.  Put most of functionality
                  in network processor to reduce perturbation.  Adds
                  timestamps to outgoing messages to determine latencies at
                  various levels in protocol.  Maintains global clock.
                  3\% execution time overhead.  Specific to Myrinet.  Targets
                  communication overheads.}
}

@INPROCEEDINGS{liao+:iccad03,
    AUTHOR = {S. Liao and L. He},
    TITLE = {{Full-Chip Interconnect Power Estimation and Simulation Considering Concurrent Repeater and Flip-flop Insertion}},
    BOOKTITLE = {ICCAD},
    YEAR = {2003}
}


@INPROCEEDINGS{lie2000,
AUTHOR = { D. Lie and C. Thekkath and M. Mitchell and P. Lincoln and D. Boneh J. Mitchell and M. Horowitz},
TITLE={{Architectual Support For Copy and Tamper Resistant Software }},
BOOKTITLE = ASPLOS9,
YEAR = 2000,
PAGES = { },
ORGANIZATION = { },
PUBLISHER = { },
ADDRESS = { },
OFNOTE = {},
ANNOTE = {}     }

@INPROCEEDINGS{david2003,
AUTHOR = {David Lie and Chandramohan A. Thekkath and Mark Horowitz},
TITLE={{Implementing an Untrusted Operating System on Trusted Hardware}},
BOOKTITLE = {Proceedings of the 19th ACM Symposium on Operating Systems Principles},
YEAR = { October, 2003 },
PAGES = {178-192 },
ORGANIZATION = { },
ADDRESS = { },
OFNOTE = {},
ANNOTE = {}     }
%
@INPROCEEDINGS{lin+:hpca01,
        AUTHOR = {W. Lin and S. Reinhardt and D. Burger},
        TITLE = {Reducing DRAM Latencies with an Integrated Memory Hierarchy Design},
        BOOKTITLE = HPCA7,
        YEAR = 2001,
        MONTH = jan}

@INPROCEEDINGS{lee+:micro97,
    AUTHOR = {C. Lee and I.K. Chen and T.N. Mudge},
    TITLE = {The Bi-Mode Branch Predictor},
    BOOKTITLE = MICRO30,
    MONTH = dec,
    YEAR = 1997,
    PAGES = {4-13},
}

@INPROCEEDINGS{loh+:pact02,
    AUTHOR = {G.H. Loh and D.S. Henry},
    TITLE = {Predicting Conditional Branches With Fusion-Based Hybrid Predictors},
    BOOKTITLE = PACT02,
    MONTH = sep,
    YEAR = 2002,
    PAGES = {165-176},
}

@INPROCEEDINGS{loh+:ieaaie02,
    AUTHOR= {G.H. Loh and D.S. Henry},
    TITLE = {Applying Machine Learning for Ensemble Branch Predictors},
    BOOKTITLE = {15th Conference on Industrial and Engineering Applications of Artificial Intelligence and Expert Systems},
    MONTH = jun,
    PAGES = {264-274},
    YEAR = 2002,
}

@ARTICLE{lu+:ijpp03,
    AUTHOR = {Z. Lu and J. Lach and M. Stan and K. Skadron},
    TITLE = {Alloyed Branch History: Combining Global and Local Branch History for Robust Performance},
    JOURNAL = IJPP,
    NUMBER = 2,
    VOLUME = 31,
    YEAR = 2003,
}

@INPROCEEDINGS{lyonnard+:dac01,
        AUTHOR    = {D. Lyonnard and S. Yoo, A. Baghdadi and A. A. Jerraya},
        TITLE     = {{Automatic Generation of Application-Specific Architectures for Heterogeneous Multiprocessor System-on-Chip}},
        BOOKTITLE = DAC01,
        YEAR      = 2001,
        MONTH     = June,
}

@INPROCEEDINGS{lyubashevskiy+:wefts98,
        AUTHOR    = {Igor Lyubashevskiy and Volker Strumpen},
        TITLE     = {{Compiler-Supported Portable, Fault-Tolerant File I/O}},
        BOOKTITLE = {IEEE Workshop on Embedded Fault Tolerant Systems},
        YEAR      = 1998,
        MONTH     = may,
        PAGES     = {49-56}
}


%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%M

@ARTICLE{Montanaroetal96,
  author = {James Montanaro and et al.},
  month = {November},
  year = 1996,
  title = {{A 160-MHz, 32-b, 0.5-W CMOS RISC Microprocessor}},
  volume = {Vol. 9 No.1},
  journal = {Digital Technical Journal}
}



@INPROCEEDINGS{magklis+:isca03,
        AUTHOR    = {Grigorios Magklis and Michael L. Scott and Greg Semeraro and David H. Albonesi and Steven Dropsho},
        TITLE     = {Profile-based Dynamic Voltage and Frequency Scaling for a Multiple Clock Domain Microprocessor},
        BOOKTITLE = ISCA03,
        YEAR      = 2003,
        MONTH     = jun,
        PAGES     = {14-25},
        ABSTRACT  = {Targets a Multiple Clock Domain (MCD) processor,
                     in which each processor region (e.g., int unit, fp unit,
                     l1/l2 cache, memory, front-end) is internally
                     synchronous, but the domains operate asynchronously
                     of one another.  Domains can run at different
                     frequencies and voltages.  Uses profiling (via ATOM)
                     of loops and subroutines to determine long-running
                     blocks of code.  Then creates a DAG for each of
                     these blocks, with control and data dependences.
                     A "shaker" algorithm attempts to "stretch" out
                     events (blocks of execution) that complete before
                     they are needed-- imagine a node with two input
                     dependences, one finishes first, the other has slack.
                     Because individual events can not be scaled (but
                     rather domains), a heuristic is used to set the
                     frequency of domains so as to be within some
                     set performance threshold.  The paper considers
                     a few types of reconfiguration-- some are context
                     (i.e., call chain) dependent.  In those cases,
                     the binary is instrumented to track the call chain
                     and uses a table lookup at each reconfiguration point.
                     If the reconfiguration is call-chain insensitive then
                     there need be no table lookup.}
}

@ARTICLE{magnusson+:computer02,
    AUTHOR = {P. Magnusson and M. Christensson and J. Eskilson and D. Forsgren and G. Hallberg and J. Hogberg and F. Larsson and A. Moestedt and B. Werner},
    TITLE = {{Simics: A Full System Simulation Platform}},
    JOURNAL = IEEE-COMPUTER,
    MONTH = feb,
    YEAR = 2002
}

@INBOOK{mandic+:book01,
    AUTHOR = {D. Mandic and J. Chambers},
    TITLE = {Recurrent Neural Networks for Prediction: Learning Algorithms, Architectures and Stability},
    PUBLISHER = {John Wiley \& Sons},
    YEAR = {2001},
    MONTH = aug,
    NOTE = {ISBN: 0471495174}}


@CONFERENCE{marathe+:cgo03,
    AUTHOR = {J. Marathe and F. Mueller and T. Mohan and B.R. de Supinski and S.A. McKee and A. Yoo},
    TITLE = {{METRIC}: Tracking Down Inefficiencies in the Memory Hierarchy via Binary Rewriting},
    BOOKTITLE = CGO03,
    MONTH = mar,
    YEAR = 2003,
    PAGES = {289-300},
}

@INPROCEEDINGS{Markatos,
AUTHOR = {E.P. Markatos and M.G.H. Katevenis},
TITLE={ User-Level DMA without Operating System Kernel Modifications },
BOOKTITLE = { Proc. 3rd Symp. High-Performance Computer Architecture (HPCA-3) },
YEAR = { 1997 },
PAGES = { },
ORGANIZATION = { },
PUBLISHER = {IEEE CS Press},
ADDRESS = { Los Alamitos, CA },
OFNOTE = {},
ANNOTE = {}     }

@inproceedings{martonosi+:sigmetrics96,
  title        = {Integrating Performance Monitoring and Communication in
                  Parallel Computers},
  author       = {M. Martonosi and D. Ofelt and M. Heinrich},
  booktitle    = SIGMETRICS96,
  month        = {May},
  year         = {1996},
  mynote         = {Embedded perf monitor into cache coherence protocol handlers
                  running on FLASH multiprocessor's MAGIC chip.}
}

@CONFERENCE{mathew+:hpca00,
        AUTHOR = {B.K. Mathew and S.A. McKee and J.B. Carter and A. Davis},
        TITLE = {Design of a Parallel Vector Access Unit for {SDRAM} Memories},
        BOOKTITLE = HPCA6,
        PAGES = {39-48},
        MONTH = jan,
        YEAR = 2000}

@CONFERENCE{mathew+:spaa00,
        AUTHOR = {B.K. Mathew and S.A. McKee and J.B. Carter and A. Davis},
        TITLE = {Algorithmic Foundations for a Parallel Vector Access Memory System},
        BOOKTITLE = SPAA00,
        PAGES = {156-165},
        MONTH = jul,
        YEAR = 2000}

@TECHREPORT{mccreight:tr84,
    AUTHOR = {E. McCreight},
    TITLE = {{The Dragon Computer System: An Early Overview}},
    INSTITUTION = {{Xerox Corp.}},
    MONTH = September,
    YEAR = 1984,
}

@ARTICLE{mckee+:tc00,
        AUTHOR = {S.A. McKee and Wm.A. Wulf and J.H. Aylor and R.H. Klenke and M.H. Salinas and S.I. Hong and D.A.B. Weikle},
        TITLE = {Dynamic Access Ordering for Streamed Computations},
        JOURNAL = IEEE-TC,
        YEAR = 2000,
        VOLUME = {49},
        NUMBER = {11},
        PAGES = {1255-1271},
        MONTH = nov}

@misc{mcfarling:wrl93,
    AUTHOR = {S. McFarling},
    TITLE = {Combining Branch Predictors},
    howpublished = {Digital Western Research Lab Technical Report {TN-36}},
    MONTH = jun,
    YEAR = 1993,
}

@ARTICLE{mckinley+:tocs99,
        AUTHOR   = {Kathryn S. McKinley and Olivier Temam},
        TITLE    = {Quantifying Loop Nest Locality Using {SPEC}'95 and the Perfect Benchmarks},
        JOURNAL  = ACM-TOCS,
        YEAR     = 1999,
        VOLUME   = {17},
        NUMBER   = {4},
        PAGES    = {288-336},
        MONTH    = nov,
        ABSTRACT = { "Most reuse is within a loop nest ... most misses are
                     internest capacity misses." }
}

@INPROCEEDINGS{michaud+:isca97,
    AUTHOR = {P. Michaud and A. Seznec and R. Uhlig},
    TITLE = {Trading Conflict and Capacity Aliasing in Conditional Branch Predictors},
    BOOKTITLE = ISCA97,
    MONTH = jun,
    YEAR = 1997,
    PAGES = {292-303},
}

@ARTICLE{mellor-crummey+:jpp01,
       AUTHOR   = {John Mellor-Crummey and David Whalley and Ken Kennedy},
       TITLE    = {Improving Memory Hierarchy Performance for Irregular Applications Using Data and Computation Reorderings},
       JOURNAL  = {International Journal of Parallel Programming},
       VOLUME   = {28},
       NUMBER   = {3},
       MONTH    = jun,
       YEAR     = 2001,
       ABSTRACT = {Considers app domain of particle simulations in
                   2 or more dimensions.  These exhibit irregular
                   accesses due to the order of accesses in an
                   interaction list.  Data reodering approaches
                   include use of space-fitting curves and a first-touch
                   policy.  A space-fitting curve passes close to each
                   point in d dimensions and so maps it to 1 dim.  These
                   produces locality since points close in d-space are
                   close along curve.  A first-touch policy linearly
                   scans the interaction list to determine an order.
                   Computational reodering approaches include use of
                   space-filling curves, where entries in interaction
                   list are sorted according to points they reference,
                   and blocking, where only interactions between particles
                   within particular sub-blocks are considered.
                   benchmarks: moldyn, magi, CHAD.  Reorderings were
                   applied by manually inserted calls to a general-purpose
                   library.  Data reordering introduces an indirection
                   vector which may hurt performance.  CHAD shows
                   little improvement because there exists less reuse
                   to exploit.  Could we have determined this statically?}
}

@misc{mentor:cve,
    author        = {Mentor Graphics},
    title         = {{Hardware/Software Co-Verification: Seamless}},
    howpublished  = {http://www.mentor.com/seamless},
    month         = {},
    year          = {},
    note          = {}
}


@misc{MITmc:url02,
    author        = {MIT Laboratory for Computer Science Computation Structures Group},
    title         = {Malleable Caches},
    howpublished  = {http://csg.lcs.mit.edu/projects/index.php?link=mc.txt},
    month         =  nov,
    year          = 2002,
    note          = {}
}

@mastersthesis{mohan:master02,
  author    = {T. Mohan},
  title     = {{Detecting and Exploiting Spatial Regularity in Data Memory References}},
  school    = {School of Computing, University of Utah},
  year      = 2002,
  type      = {},
  address   = {},
  month     = dec,
  note      = {}
}

@INPROCEEDINGS{mohan+:sc03,
  author =       {T. Mushar and B.R. de Supinski and S.A. McKee and F. Mueller and A. Yoo and
                  M. Schulz},
  title =        {{Identifying and Exploiting Spatial Regularity in Data Memory References}},
  booktitle =    SUPER03,
  year =         2003,
  month = nov
}

@misc{motorola:mpc750a,
    author        = {Motorola Inc.},
    title         = {{MPC 750A RISC Microprocessor Hardware Specification}},
    howpublished  = {http://www.mot.com/SPS/PowerPC /library/750\_hs.pdf},
    month         = {},
    year          = {},
    note          = {}
}


@manual{motorola01:mpc,
  title    = {{MPC}7450 {RISC} Microprocessor Family User's Manual},
  year     = {2001},
  organization = {Motorola},
  location = {Schaumburg, IL},
  mynote     = {Has 6 32-bit registers.  Maintains a sampled instruction
              register (SIAR) with the effective address of the last
              instruction that completes before the perf monitor exception
              is generated.  NB:  Loss of accuracy in mapping that back
              to the instruction in question.  Interrupt triggered on
              overflow or via a bit transition in the time base register.
              A process can be marked so that only events germaine to
              a particular process are sampled.  Over 200 events.}
}

@INPROCEEDINGS{mu+:softvis03,
    AUTHOR = {T. Mu and J. Tao and M. Schulz and S. McKee},
    TITLE = {{Interactive Locality Optimization on NUMA Architectures}},
    BOOKTITLE = {Proceedings of the ACM 2003 Symposium on Software Visualization (SoftVis)},
    MONTH = jul,
        PAGES = {133-142,214},
    YEAR = 2003
}

@conference{mucci+:hpcmp99,
        author = {P. J. Mucci and S. Browne and C. Deane and G. Ho},
        title = {PAPI: A portable interface to hardware performance
                counters},
        booktitle = {Proc. Department of Defense {HPCMP} User Group Conference},
        year = 1999,
        month = jun}

@misc{MySQL:url02,
    author = {{MySQL AB}},
    title = {{MySQL}: The World's Most Popular Open Source Database},
    howpublished = {http://www.mysql.com/},
    year = 2002,
}



%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%N

@INPROCEEDINGS{nair:isca95,
    AUTHOR = {R. Nair},
    TITLE = {Dynamic Path-Based Branch Correlation},
    BOOKTITLE = ISCA95,
    MONTH = jun,
    YEAR = 1995,
    PAGES = {15-23},
}


@InProceedings{nguyen+:iccd96,
  author =       {A-T. Nguyen and M. Michael and A. Sharma and J. Torrellas},
  title =        {The Augmint Multiprocessor Simulation Toolkit for Intel x86 Ar
chitectures},
  booktitle =    {Proceedings of 1996 International Conference on Computer Desig
n},
  OPTcrossref =  {},
  OPTkey =       {},
  OPTpages =     {},
  year =         {1996},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {October},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}


@INPROCEEDINGS{noordergraaf+:sc02,
  author =       {L. Noordergraaf and R. Zak},
  title =        {{SMP Interconnect Instrumentation for Performance Analysis}},
  booktitle =    SUPER02,
  year =         2002,
  month = nov
}


%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%O

@INPROCEEDINGS{olukotun+:asplos96,
    AUTHOR = {K. Olukotun and et al.},
    TITLE = {{The Case for a Single-Chip Multiprocessor}},
    BOOKTITLE = ASPLOS7,
    PAGES = {2-11},
    MONTH = oct,
    YEAR = 1996
}

@MISC{rwcp:omniurl03,
    AUTHOR = {{RWCP}},
    TITLE = {{OMNI OpenMP} Compiler Project},
    HOWPUBLISHED = {http://phase.hpcc.jp/Omni/home.html},
    YEAR = 2003,
}

%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%P

@ARTICLE{pai+:archnews97,
        AUTHOR  = {V.S. Pai and P. Ranganathan and S.V. Adve},
        TITLE   = {{RSIM} Reference Manual, version 1.0},
        JOURNAL = {IEEE Technical Committee on Computer Architecture
                        Newsletter},
        MONTH = {Fall},
        YEAR = 1997}

@INPROCEEDINGS{pan+:asplos92,
    AUTHOR = {S. Pan, K. So, J.T. Rahmeh},
    TITLE = {Improving the Accuracy of Dynamic Branch Prediction Using Branch Correlation},
    BOOKTITLE = ASPLOS5,
    MONTH = oct,
    YEAR = 1992,
    PAGES = {76-84},
}

@INPROCEEDINGS{papamarcos+:isca84,
    AUTHOR = {M. Papamarcos and J. Patel},
    TITLE = {{A Low Overhead Coherence Solution for Multiprocessors with Private Cache Memories}},
    BOOKTITLE = ISCA84,
    MONTH = June,
    YEAR = 1984,
    PAGES = {348-354},
}

@INPROCEEDINGS{parker:hpcawip02,
    AUTHOR = {M. Parker},
    TITLE = {{A Case for User-Level Interrupts}},
    BOOKTITLE = {Proceedings of the HPCA-8 WiP Session},
    MONTH = feb,
    YEAR = 2002
}

@CONFERENCE{pingali+:ics02,
        AUTHOR = {V.K. Pingali and S.A. McKee and W.C. Hsieh and J.B. Carter},
        TITLE = {Computation Regrouping: Restructuring Programs for Temporal Data Cache Locality},
        BOOKTITLE = ICS02,
        YEAR = 2002,
        PAGES = {252-261},
        MONTH = jun}

@ARTICLE{pingali+:ijpp03,
        AUTHOR = {V.K. Pingali and S.A. McKee and W.C. Hsieh and J.B. Carter},
        TITLE = {Restructuring Computations for Temporal Data Cache Locality},
        JOURNAL = IJPP,
        YEAR = 2003,
    VOLUME = 31,
    NUMBER = 4,
        PAGES = {306-338},
        MONTH = aug,
        ABSTRACT = {Targets apps employing logical operations: short
                    streams of nearly independent computations that
                    access many data objects with little reuse.  Examples
                    include tree operations on an R-Tree, scanning a ray
                    during raytracing, hash table access,
                    or simulation of one time step.  Identifies data
                    objects that fit in L2 cache and then reorganizes
                    computations from multiple logical operations to
                    maximize utilization of cached objects.  Transformations
                    are early execution, deferred execution, computation
                    merging, and filtered execution.  Early execution
                    brings forward future computations that touch
                    data accessed by the current computation, e.g.,
                    FFT's column walk only touches part of a cache line,
                    so also perform the other walks that touch the rest
                    of the line.  Deferred execution delays operations
                    until sufficiently many have been accumulated to
                    amortize the costs of fetching data, e.g., queuing
                    tree operations at nodes.  Computation merging
                    is like deferred execution where a later operation
                    makes an earlier, queued operation unnecessary.
                    Filtered execution places a sliding window on a
                    traversed data structure and allows accesses only to
                    the part of the structure visible through the window.
                    These transformations are applied manually.}
}

@INPROCEEDINGS{prvulovic+:isca03,
    AUTHOR = {M. Prvulovic and J. Torrellas},
    TITLE = {ReEnact: Using Thread-Level Speculation Mechanisms to Debug Data Races in Multithreaded Codes},
    BOOKTITLE = ISCA03,
    YEAR = 2003,
    MONTH = jun,
    PAGES = {110-121},
}
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%Q

%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%R

@INPROCEEDINGS{ramkumar+:isftc,
    TITLE = {{Portable Checkpointing for Heterogeneous Architectures}},
    AUTHOR = {Balkrishna Ramkumar and Volker Strumpen},
    BOOKTITLE = {International Symposium on Fault-Tolerant Computing},
    MONTH = jun,
    YEAR = 1997,
    PAGES = {58-67}
}

@INPROCEEDINGS{rixner+:isca00,
    TITLE = {Memory Access Scheduling},
    AUTHOR = {Scott Rixner and William J. Dally and Ujval J. Kapasi and Peter Mattson and John D. Owens},
    BOOKTITLE = ISCA00,
    MONTH = jun,
    YEAR = 2000,
    PAGES = {128-138},
}

@inproceedings{romer+:osdi94,
  title     = {Instrumentation and Optimization of Win32/Intel Executables Using Etch},
  author    = {Ted Romer and Geoff Voelker and Dennis Lee and Alec Wolman and Wayne Wong and Hank Levy and Brian Bershad},
  booktitle = {Proceedings of the 1st Symposium on Operating Systems Design and Implementation},
  year      = {1994},
  pages     = {255--266}
}

@INBOOK{rosenblatt:book62,
    TITLE = {Principles of Neurodynamics: Perceptrons and the Theory of Brain Mechanisms},
    AUTHOR = {F. Rosenblatt},
    PUBLISHER = {Spartan, New York},
    YEAR = 1962,
}


%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%S


@inproceedings{salami+:cases02,
    author = {E. Salam{\'\i} and J. Corbal and C. \'{A}lvarez and M. Valero},
    title = {Cost Effective Memory Disambiguation for Multimedia Codes},
    booktitle = {International Conference on Compilers, Architectures, and Synthesis for Embedded Systems},
    month = oct,
    pages = {117-126},
    year = 2002,
}

@inproceedings{sank+:iccd03,
    author = {K. Sankaralingam and V. A. Singh and S. W. Keckler and D. Buger},
    title = {{Routed Inter-ALU Networks for ILP Scalability and Performance}},
    booktitle = {ICCD},
    year = {2003}
}


@techreport{sazeides+:wisc97,
    AUTHOR = {Y. Sazeides and J. Smith},
    TITLE = {Implementations of Context-Based Value Predictors},
    INSTITUTION = {University of Wisconsin},
    NUMBER = {TRECE -97-8},
    YEAR = 1997,
}

@CONFERENCE{schaelicke+:mascots00,
        author = {L. Schaelicke and A. Davis and S.A. McKee},
        title = {Profiling Interrupts in Modern Architectures},
        booktitle = {Proc. 8th International Symposium on Modeling, Analysis and Simulation of Computer and Telecommunication Systems},
        month = jul,
        year = 2000,
        pages = {115-123}
}


@misc{schaelicke+:url02,
    author        = {L. Schaelicke and M. Parker},
    title         = {{ML-RSIM Home Page}},
    howpublished  = {http://www.cse.nd.edu/~mlrsim/index.php},
    month         = dec,
    year          = 2002,
    note          = {}
}

@article{schulz+:fgcs03,
    AUTHOR = {M. Schulz and J. Tao and C. Trinitis and W. Karl},
    TITLE = {{SMiLE: an integrated, multi-paradigm software infrastructure for SCI-based clusters}},
    JOURNAL = {Future Generations Computer Systems (FGCS)},
    VOLUME = {19},
    PAGES = {521-532},
    MONTH   = feb,
    YEAR    = 2003

}

@INPROCEEDINGS{schulz:hpcd02,
    AUTHOR = {M. Schulz},
    TITLE = {{Using Semantic Information to Guide Efficient Parallel I/O on Clusters}},
    BOOKTITLE = {Proceedings of the 11th IEEE International Symposium on High-Performance Distributed Computing (HPDC)},
    MONTH = jul,
        PAGES = {135-142},
    YEAR = 2002
}

@INPROCEEDINGS{schulz+:ipdps03,
    AUTHOR = {M. Schulz and S. McKee},
    TITLE = {{A Framework for Portable Shared Memory Programming}},
    BOOKTITLE = IPDPS03,
    MONTH = apr,
    YEAR = 2003
}

@inproceedings{schulz+:msp02,
    author = {M. Schulz and J. Tao and J. Jeitner and W. Karl},
    title  = {A Proposal for a New Hardware Cache Monitoring Architecture},
    booktitle = {Proceedings of the Workshop on Memory Systems Performance (MSP 2002)},
    month  = jun,
    year   = {2002}
}

@TECHREPORT{seznec:note03,
    AUTHOR = {Andr{\`e} Seznec},
    TITLE = {An Optimized 2bcgskew Branch Predictor},
    INSTITUTION = {{IRISA/INRIA}},
    NUMBER = {Research Note},
    howpublished  = {{http://www.irisa.fr/caps/people/seznec/Optim2bcgskew.pdf}},
    MONTH = sep,
    YEAR = 2003,
}

@INPROCEEDINGS{seznec+:isca02,
    AUTHOR = {A. Seznec and S. Felix and V. Krishnan and Y. Sazeides},
    TITLE = {Design Trade-Offs on the {EV8} Branch Predictor},
    BOOKTITLE = ISCA02,
    MONTH = may,
    YEAR = 2002,
    PAGES = {296-306},
}

@TECHREPORT{seznec:tr03,
    AUTHOR = {A. Seznec},
    TITLE = {Redundant History Skewed Perceptron Predictors: Pushing Limits on Global History Branch Predictors},
    INSTITUTION = {{IRISA}},
    NUMBER = {Technical Report 1554},
    howpublished  = {{http://www.irisa.fr/caps/people/seznec/index_en.htm}},
    MONTH = sep,
    YEAR = 2003,
}

@TECHREPORT{seznec+:tr99,
    AUTHOR = {A. Seznec and P. Michaud},
    TITLE = {Dealiased Hybrid Branch Predictors},
    INSTITUTION = {{IRISA}},
    NUMBER = {Technical Report 1229},
    howpublished  = {{ftp://ftp.irisa.fr/PI-1229.ps.gz}},
    MONTH = feb,
    YEAR = 1999,
}

@ARTICLE{seznec:ieeetc97,
    AUTHOR = {A. Seznec},
    TITLE = {Decoupled Sector Caches},
    JOURNAL = IEEE-TC,
    VOLUME = 46,
    ISSUE = 2,
    YEAR = 1997,
    PAGES = {210-215},
}

@INPROCEEDINGS{seznec+:isca96,
    AUTHOR = {A. Seznec and S. Felix and V. Krishnan and Y. Sazeides},
    TITLE = {Design Trade-Offs on the {EV8} Branch Predictor},
    BOOKTITLE = ISCA02,
    MONTH = may,
    YEAR = 2002,
    PAGES = {296-306},
}

@INPROCEEDINGS{seznec+:asplos96,
    AUTHOR = {A. Seznec and S. Jourdan and P/ Sainrat and P. Michaud},
    TITLE = {Multiple-Block Ahead Branch Predictors},
    BOOKTITLE = ASPLOS7,
    PAGES = {116-127},
    MONTH = oct,
    YEAR = 1996,
}

@misc{SGIo3000:url02,
    author        = {SGI corporation},
    title         = {SGI-Products: Servers and Supercomputers: SGI Origin 3000},
    howpublished  = {http://www.sgi.com/origin/3000/},
    month         = dec,
    year          = 2002,
    note          = {}
}

@INPROCEEDINGS{sherwood+:pact01,
    author= {T. Sherwood and E. Perelman and B. Calder},
    title= {{Basic Block Distribution Analysis to Find Periodic Behavior and Simulation Points in Applications}},
    booktitle= PACT01,
    year=2001,
    month = sep,
    pages = {3-14},
}

@INPROCEEDINGS{sherwood+:asplos02,
    AUTHOR = {T. Sherwood and E. Perelman and G. Hamerly and B. Calder},
    TITLE  = {{Automatically Characterizing Large Scale Program Behavior}},
    BOOKTITLE = ASPLOS10,
    YEAR =2002,
    MONTH = oct,
    PAGES = {45-57},
}



@TechReport{sherwood+:tr99,
    AUTHOR = {Timothy Sherwood and Brad Calder},
    INSTITUTION =  {University of California-San Diego},
    TITLE  =  {Time Varying Behavior of Programs},
    YEAR =  1999,
    MONTH =  aug,
    NUMBER = {UCSD-CS99-630},
}

@TechReport{shiva+:cacti,
    AUTHOR = {P. Shivakumar and N. P. Jouppi},
    INSTITUTION =  {HP Western Research Labs},
    TITLE  =  {{CACTI 3.0: An Integrated Cache Timing, Power, and Area Model}},
    YEAR =  {2001},
    NUMBER = {2001.2},
}

@MISC{sia:2001,
    TITLE = {{National Techonology Roadmap for Semiconductors}},
    AUTHOR = {SIA},
    YEAR = {2001}
}

@MISC{simplescalar,
    AUTHOR = {Todd M. Austin},
    TITLE = {Simplescalar Tool Suite},
    HOWPUBLISHED = {http:/www.simplescalar.com}
}

@MISC{lpsolve,
        AUTHOR = {Eindhoven University of Technology},
    TITLE = {{LP\_solve}},
    HOWPUBLISHED = {ftp:/ftp.es.ele.tue.nl/pub/lp\_solve/}
}

@inproceedings{smith:isca81,
    AUTHOR = {J.E. Smith},
    TITLE =  {A Study of Branch Prediction Strategies},
    BOOKTITLE = ISCA81,
    MONTH = may,
    YEAR = 1981,
    PAGES = {135-148},
}

@article{smith+:ieee95,
    AUTHOR = {J.E. Smith and G. Sohi},
    TITLE = {The Microarchitecture of Superscalar Processors},
    JOURNAL = {Proceedings of the {IEEE}},
    VOLUME = {83},
    NUMBER = {12},
    PAGES = {1609-1624},
    MONTH   = aug,
    YEAR    = 1995,

}

@MISC{spec:omp01,
    TITLE = {{SPEC OMP} Benchmark Suite},
    AUTHOR = {Standard Performance Evaluation Corporation},
    HOWPUBLISHED = {http://www.specbench.org/hpg/omp2001/},
    YEAR = 2001,
}

@INPROCEEDINGS{sprangle+:isca97,
    TITLE = {The Agree Predictor: A Mechanism for Reducing Negative Branch History Interference},
    AUTHOR = {E. Sprangle and R.S. Chappell and M. Alsup and Y.N. Patt},
    BOOKTITLE = ISCA97,
    MONTH = jun,
    YEAR = 1997,
    PAGES = {284-291},
}

@INPROCEEDINGS{sprangle+:isca02,
    TITLE = {Increasing Processor Performance by Implementing Deeper Pipelines},
    AUTHOR = {E. Sprangle and D. Carmean},
    BOOKTITLE = ISCA02,
    MONTH = may,
    YEAR = 2002,
    PAGES = {25-34},
}

@article{sprunt1:micro02,
  title        = {The Basics of Performance-Monitoring Hardware},
  author       = {Brinkley Sprunt},
  journal      = {IEEE Micro},
  month        = {July/August},
  year         = {2002},
  pages        = {64--71}
}

@article{sprunt2:micro02,
  title        = {Pentium 4 Performance-Monitoring Features},
  author       = {Brinkley Sprunt},
  journal      = {IEEE Micro},
  month        = {July/August},
  year         = {2002},
  pages        = {72--82}
}

@INPROCEEDINGS{srivastava+:pldi94,
    AUTHOR = {A. Srivastava and A. Eustace},
    TITLE = {{ATOM}: a System for Building Customized Program Analysis Tools},
    BOOKTITLE = PLDI94,
    MONTH = jun,
    YEAR = 1994,
    PAGES = {196-205},
}


@INPROCEEDINGS{stark+:asplos98,
    TITLE = {Variable Length Path Prediction},
    AUTHOR = {J. Stark and M. Evers and Y.N. Patt},
    BOOKTITLE = ASPLOS8,
    MONTH = oct,
    YEAR =  1998,
    PAGES = {170-179},
}

@TECHREPORT{sun+:tr03,
        AUTHOR = {Di-shi Sun and Douglas M. Blough},
        TITLE = {{I/O Threads: A Novel I/O Approach for System-on-a-Chip Networking}},
        INSTITUTION = {CERCS, Georgia Institute of Technology},
        NUMBER = {},
        MONTH = August,
        YEAR = 2003
}

@misc{synopsys:vcs,
    author        = {Synopsys},
    title         = {{VCS Data Sheet}},
    howpublished  = {http://www.synopsys.com/products/simulation /vcs\_ds.html},
    month         = {},
    year          = {},
    note          = {}
}


@book{hennessy+patterson:computer_organization_and_design,
  author    = {{Hennessy and Patterson}},
  title     = {{Computer Organization and Design: The Hardware / Software Interface}},
  edition   = {Second},
  pages     = {759},
  year      = {1998},
  publisher = {Morgan Kaufmann Publishers, Inc.}
}

@BOOK{stoll:cuckoo,
  author        = {Clifford Stoll},
  title         = {The Cuckoo's Egg:  Tracking a Spy Through a Maze of Computer Espionage}
}

@MANUAL{strumpen:porch97,
    TITLE = {{porch User's Guide}},
    AUTHOR = {Volker Strumpen},
    ADDRESS = {Laboratory for Computer Science, Massachusetts Institute for Technology},
    MONTH = oct,
    YEAR = 1997}

@INPROCEEDINGS{suh2003,
AUTHOR = { E. G. Suh and D. Clarke and M. van Dijk and B. Gassend and S.Devadas},
TITLE = {{AEGIS: Architecture for Tamper-Evident and Tamper-Resistant Processing }},
BOOKTITLE = { Proceedings of The Int'l Conference on Supercomputing},
YEAR = {2003},
PAGES = { },
ORGANIZATION = { },
PUBLISHER = { },
ADDRESS = { },
OFNOTE = {},
ANNOTE = {}     }

@INPROCEEDINGS{edward2003b,
AUTHOR = { E. G. Suh and D. Clarke and B. Gassend and M. van Dijk and S. Devadas},
TITLE = {{Efficient Memory Integrity Verification and Encryption for Secure Processors}},
BOOKTITLE = { Proceedings 0f the 36th Annual International Symposium on Microarchitecture},
YEAR = {December, 2003},
PAGES = { },
ORGANIZATION = { },
PUBLISHER = { },
ADDRESS = { },
OFNOTE = {},
ANNOTE = {}     }


@MISC{strumpen:submitted03,
    AUTHOR = {Volker Strumpen},
    TITLE = {{Compiler Technology for Portable Checkpoints}},
    HOWPUBLISHED = {submitted for publication, available at project homepage}}

@INPROCEEDINGS{suh+:hpca03,
    AUTHOR = {E. Suh and B. Gassend and D. Clarke and M. Van Dijk and S. Devadas},
    TITLE = {Caches and Merkle Trees for Efficient Memory Authentication},
    BOOKTITLE = HPCA9,
    MONTH = feb,
    YEAR = 2003,
}

@INPROCEEDINGS{Gassend2003,
AUTHOR = {B. Gassend and G. E. Suh and D. Clarke and M. van Dijk and S. Devadas},
TITLE={{Caches and Hash Trees for Efficient Memory Integrity Verification}},
BOOKTITLE = HPCA9 ,
YEAR =  2003,
PAGES = { },
ORGANIZATION = { },
PUBLISHER = {},
ADDRESS = {  },
OFNOTE = {},
ANNOTE = {}     }


@manual{sun97:ultrasparcIIi,
  title    = {Ultra-{SPARC}-{II}i User's Manual},
  location = {Palo Alto, CA},
  organization = {Sun Microsystems},
  year     = {1997},
  url      = {http://www.sun.com/oem/products/manuals/805-0087.pdf},
  mynote     = {2 perf counters.  No interrupt upon counter overflow.
              Disambiguates between user and system events.  About 20 events.}
}

@misc{sun:ultrasparc,
    author        = {Sun Microsystems},
    title         = {{UltraSPARC User's Manual}},
    howpublished  = {http://www.sun.com/processors/manuals /802-7220-02.pdf},
    month         = {},
    year          = {},
    note          = {}
}


%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%T

@INPROCEEDINGS{tang76:ncc,
    AUTHOR = {C. K. Tang},
    TITLE = {{Cache Design in the Tightly Coupled Multiprocessor System}},
    BOOKTITLE = {AFIPS Conference Proceedings of National Computer Conference},
    PAGES = {749-753},
        MONTH = June,
    YEAR = 1976
}

@ARTICLE{thiebaut:tc89,
    AUTHOR = {Dominique Thi\'ebaut},
    TITLE = {On the Fractal Dimension of Computer Programs and its
             Application to the Prediction of the Cache Miss Ratio},
    JOURNAL = IEEE-TC,
    VOLUME = {38},
    NUMBER = {7},
    PAGES = {1012-1026},
    MONTH = jul,
    YEAR = 1989,
    ABSTRACT = {Models instruction cache misses as a random walk across
                memory cells.  This characterization is interesting
                because the parameter (theta), is a measure of
                program complexity, and more specifically, a measure of
                reuse showing transient or recurrent behavior.
                However, data and stack references are found not to be
                similarly fractal.}
}


%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%U

@ARTICLE{uht+:ieeecomputer97,
    AUTHOR = {A.K. Uht and V. Sindagi and S. Somanathan},
    TITLE = {Branch Effect Reduction Techniques},
    JOURNAL = IEEE-COMPUTER,
    VOLUME = 30,
    NUMBER = 5,
    PAGES = {71-81},
    YEAR = 1997,
}

%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%V

@CONFERENCE{vachharajani+:micro02,
    TITLE = {Microarchitectural Exploration with Liberty},
    AUTHOR = {M. Vachharajani and N. Vachharajani and D.A. Penry and J.A. Blome and D.I. August},
    BOOKTITLE = MICRO35,
    MONTH = nov,
    YEAR = 2002,
    PAGES = {271-282},
}

@CONFERENCE{vercauyeren+:dac,
    TITLE = {{Constructing Application-Specific Heterogeneous Embedded Architectures from Custom HW/SW Applications}},
    AUTHOR = {S. Vercauteren and B. Lin and H. De Man},
    BOOKTITLE = DAC96,
    MONTH = {June},
    YEAR = 1996
}

@CONFERENCE{veenstra+:mascots94,
        AUTHOR = {J.E. Veenstra and R.J. Fowler},
        TITLE = {MINT: A Front End for Efficient Simulation of
                 Shared-Memory Multiprocessors},
        BOOKTITLE = {MASCOTS 1994},
        YEAR = 1994,
        MONTH = jan}


@inproceedings{ villa00dynamic,
    author = "Luis Villa and Michael Zhang and Krste Asanovic",
    title = "Dynamic zero compression for cache energy reduction",
    booktitle = MICRO00,
    pages = "214-220",
    year = "2000",
    url = "citeseer.nj.nec.com/villa00dynamic.html" }


@ARTICLE{voldman+:ibm81,
    AUTHOR = {Jean Voldman and Lee W. Hoevel},
    TITLE = {The Software-Cache Connection},
    JOURNAL = IBM-RD,
    VOLUME = {25},
    NUMBER = {6},
    PAGES = {877-892},
    MONTH = nov,
    YEAR = 1981,
    ABSTRACT = {Describes seminal work using Fourier analysis to capture
                cache miss behavior.  As stated by the authors, this
                approach is valuable because predictable cache misses
                enable improved cache performance through intelligent
                cache management (replacement) and prefetching.  The
                approach begins with a time-sequence of ones and zeroes,
                where ones represent cache misses.  (Note that no
                instruction or data misses are represented at this level.)
                This time series is Fourier-transformed into the
                frequency domain.  The Fourier transform is then filtered,
                removing background noise and frequencies making
                insignificant contributions.  The filtered transform
                is converted back to the time domain via an inverse
                FFT.  Finally, any peaks above a certain threshold are
                retained and recorded as significant cache misses.
                These cache misses were manually mapped back to the
                responsive instructions and data references.  In one
                case, this highlighted a particularly offensive code
                sequence and data structure.  The authors thus view this
                approach as a tool for understanding program behavior.
                The second half of the paper instead treats instruction
                addresses, focusing on analytical models for burstiness
                and inter-miss distances.}
}

@INPROCEEDINGS{voldman+:compcon81,
    AUTHOR = {Jean Voldman and Lee W. Hoevel},
    TITLE = {The Fourier-Cache Connection},
    BOOKTITLE = IEEE-COMPCON,
    PAGES = {344-354},
    MONTH = feb,
    YEAR = 1981,
    ABSTRACT = {This paper is mostly a subset of the authors' paper
                entitled "The Software-Cache Connection."  It does
                describe in greater depth "The Capacitor Model,"
                based on the thesis that "cache misses ... are caused
                by sudden changes in the locality of reference."
                When a context switch occurs, the new process
                suffers many cache misses.  The rate of these decreases
                as it builds up a working set in the cache (analogous
                to a capacitor charging).  Eventually, a steady state
                cache hit ratio is reached.  Finally, a context switch
                forces the cache hit ratio to plummet and the cycle
                repeats.}
}

@ARTICLE{voldman+:ibm83,
    AUTHOR = {Jean Voldman and Benoit Mandelbrot and Lee W. Hoevel
              and Joshua Knight and Philip Rosenfeld},
    TITLE = {Fractal Nature of Software-Cache Interaction},
    JOURNAL = IBM-RD,
    VOLUME = {27},
    NUMBER = {2},
    PAGES = {164-170},
    MONTH = mar,
    YEAR = 1983,
    ABSTRACT = {This paper draws a parallel between cache misses and
                Mendelbrot's fractals.  They hope such a characterization
                will yield the "intrinsic difference between workloads"
                that leads to different miss rates and that it will
                be able to measure software complexity.  They examine 3
                apps:  DB, time-sharing, and scientific.  Localities are
                visualized by plotting (rho, phi), where rho is the
                intermiss distance and phi is a function of the current
                address.  Thus, misses to adjacent cache lines are
                densely packed, while random misses scarcely populate the
                graph.  Visually, the DB plots are more complicated than
                scientific plots, reflecting the complexity of their
                memory accesses.  The authors find a power-law
                relationship between the working set size and the
                intermiss gaps, though it must be parameterized for each
                of the three workloads.  It is unclear if the misses
                are caused by instructions, data, or both.}
}

%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%W

@InProceedings{wahbe+:sosp93,
        AUTHOR    = {Robert Wahbe and Steven Lucco and Thomas E. Anderson and Susan L. Graham},
        TITLE     = {Efficient Software-Based Fault Isolation},
        BOOKTITLE = SOSP14,
        YEAR      = 1993,
        MONTH     = dec
}

@InProceedings{wang+:isca03,
        AUTHOR    = {Zhenlin Wang and Doug Burger and Kathryn S. McKinley and
                     Steven K. Reinhardt and Charles C. Weems},
        TITLE     = {{Guided Region Prefetching:  A Cooperative
                     Hardware/Software Approach}},
        BOOKTITLE = ISCA03,
        YEAR      = 2003,
        MONTH     = jun,
        PAGES     = {388-398}
}

@InProceedings{weikle+:mascots98,
        Author = {D.A.B. Weikle and S.A. McKee  and Wm.A. Wulf},
        Title = {Caches as Filters: A New Approach to Cache Analysis},
        Booktitle = {Proceedings of the Sixth International Symposium on Modeling,
                Analysis, and Simulation of Computer and Telecommunication Systems},
        Address = {Montreal, Quebec},
        Month = jul,
        Pages = {1-11},
        Year = 1998
}


@inproceedings{weikle+:hopper00,
        author = "D.A.B. Weikle and S.A. McKee and Kevin Skadron and Wm.A. Wulf",
        title = "Caches as Filters: A Framework for the Analysis of Caching Systems",
        booktitle = "Grace Murray Hopper Conference",
        month = sep,
        year = 2000
        }

@PHDTHESIS{weikle:phd01,
        AUTHOR = {D.A.B. Weikle},
        TITLE = {Caches As Filters: A Framework for the Analysis of Caching Systems},
        SCHOOL = {University of Virginia},
        MONTH = may,
        YEAR = {2001}}


@inproceedings{woo+:isca95,
  author        = {S. Woo and M. Ohara and E. Torrie and J. Singh and
          A. Gupta},
  title         = {{The SPLASH--2 Programs: Characterization and
          Methodological Considerations}},
  booktitle = {Proceedings of the 22nd International Symposium on Computer Architecture (ISCA)},
  pages     = {24--36},
  year          = 1995,
  month         = jun
}

%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%X

@INPROCEEDINGS{xu+:isca03,
    AUTHOR = {M. Xu and R. Bodik and M. Hill},
    TITLE = {A Flight Data Recorder for Enabling Full-System Multiprocessor Deterministic Replay},
    BOOKTITLE = ISCA03,
    YEAR = 2003,
    MONTH = jun,
    PAGES = {122-135},
}


%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
@INPROCEEDINGS{jun2003,
AUTHOR = {Jun Yang and Youtao Zhang and Lan Gao},
TITLE={{Fast Secure Processor for Inhibiting Software Piracty and Tampering}},
BOOKTITLE = {Proceedings of the 36th International Symposium on Microarchitecture},
YEAR = {2003},
MONTH = {December},
PAGES = { },
ORGANIZATION = { },
PUBLISHER = {},
ADDRESS = { },
OFNOTE = {},
ANNOTE = {}     }

@INPROCEEDINGS{yeh+:micro91,
    AUTHOR = {T. Yeh and Y.N. Patt},
    TITLE = {Two-Level Adaptive Branch Prediction},
    BOOKTITLE = MICRO91,
    YEAR = 1991,
    MONTH = nov,
    PAGES = {51-61},
}

@INPROCEEDINGS{yeh+:isca92,
    AUTHOR = {T. Yeh and Y.N. Patt},
    TITLE = {Alternative Implementations of Two-Level Adaptive Branch Prediction},
    BOOKTITLE = ISCA92,
    YEAR = 1992,
    MONTH = may,
    PAGES = {124-134},
}

@INPROCEEDINGS{yeh+:isca93,
    AUTHOR = {T. Yeh  and Y.N. Patt},
    TITLE = {A Comparison of Dynamic Branch Predictors That Use Two Levels of Branch History},
    BOOKTITLE = ISCA93,
    YEAR = 1993,
    MONTH = may,
    PAGES = {257-266},
}

@INPROCEEDINGS{yeh+:ics93,
    AUTHOR = {T. Yeh  and D.T. Marr and Y.N. Patt},
    TITLE = {Increasing the Instruction Fetch Rate via Multiple Branch Prediction and a Branch Address Cache},
    BOOKTITLE = ICS93,
    YEAR = 1993,
    MONTH = jul,
    PAGES = {67-76},
}

@INPROCEEDINGS{yoo+:codes01,
    AUTHOR = {S. Yoo and G. Nicolescu and D. Lyonnard and A. Baghdadi and A. A. Jerraya},
    TITLE = {{A Generic Wrapper Architecture for Multi-Processor SoC Cosimulation and Design}},
    BOOKTITLE = {CODES/CASHE},
    YEAR = 2001,
}

%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%Z

@CONFERENCE{zhang+:ics00,
        AUTHOR = {C. Zhang and S.A. McKee},
        TITLE = {Hardware-Only Stream Prefetching and Dynamic Access Ordering},
        BOOKTITLE = ICS00,
        PAGES = {167-175},
        YEAR = 2000,
        MONTH = may}


@inproceedings{zhang+:iccd97,
  author    = {X. Zhang and A. Dasdan and M. Schulz and
          R. Gupta and A. Chien},
  title     = {Architectural Adaptation for Application--Specific
          Locality Optimizations},
  booktitle = {Proceedings of the International Conference on
          Computer Design ICCD},
  year      = 1997,
  month     = oct,
  organization  = {IEEE},
  note      = {}
}

@INPROCEEDINGS{zhang-hiding,
AUTHOR = {Xiangyu Zhang and Rajiv Gupta},
TITLE={{Hiding Program Slices for Software Security}},
BOOKTITLE = {Proceedings of the Internal Conference on Code Genration and Optimization},
YEAR = { 2003 },
PAGES = {325-336},
ORGANIZATION = { },
PUBLISHER = {},
ADDRESS = { },
OFNOTE = {},
ANNOTE = {}     }

@INPROCEEDINGS{zhong+:pact03,
        AUTHOR    = {Yutao Zhong and Steven G. Dropsho and Chen Ding},
        TITLE     = {Miss Rate Prediction across All Program Inputs},
        BOOKTITLE = PACT03,
        YEAR      = 2003,
        MONTH     = sep,
        ABSTRACT  = {Examines cache miss rate as a function of input data
                     sizes, leveraging reuse distance.  If reuse distance
                     is greater than capacity of cache, C, then misses
                     are capacity misses.  Profiles program based on two
                     different input sizes; creates histogram of reuse
                     distance vs percentage of references with that distance.
                     This paper compares the histograms from each input
                     size.  If the ith group (i.e., all points with the ith
                     reuse distance) in the first histogram has the same
                     reuse distance as the ith group in the second, then
                     those references are independent of input size.
                     Others are scaled appropriately according to the input
                     size-- largest shift is O(input size).
                     Relevance to reconfig:  should determine interloop
                     reuse distance.  Make cache just large enough to
                     accomodate this size.  If this size is larger than
                     available in any configuration, then make cache small--
                     just large enough to accomodate INTRAloop accesses.
                     Note:  tomcatv and swim suffer high degree of conflict
                     misses.}
}
@INPROCEEDINGS{zhong+:lcr02,
        AUTHOR    = {Yutao Zhong and Chen Ding and Ken Kennedy},
        TITLE     = {Reuse distance analysis for scientific programs},
        BOOKTITLE = {Proceedings of Workshop on Languages, Compilers, and Runtime-Systems for Scalable Computers},
        YEAR      = 2002,
        MONTH     = mar
}

@inproceedings{ baylor+:HiPC97,
    author = "Sandra Baylor and Kattamuri Ekanadham and Joefon Jann and Beng-Hong Lim and Pratap Pattnaik",
    title = "Lazy Home Migration for Distributed Shared Memory Systems",
    booktitle = "Proc. of the 4th Int'l Conf. on High Performance Computing (HiPC'97)",
    year = "1997",
    url = "citeseer.nj.nec.com/baylor97lazy.html" }

@article{ cheung+:InfoSci02,
  author = "Benny Cheung and Cho-Li Wang and Francis Chimoon Lau",
  title = "Migrating-Home Protocol
    for Software Distributed Shared Memory",
  journal= "Journal Of Information Science And Engineering",
  year = "2002",
  url = "citeseer.nj.nec.com/543891.html" }

@inproceedings{ cheung+:ICPDPTA99,
  author = "Benny Cheung",
  title = "A Migrating-Home Protocol for Implementing Scope Consistency Model on a
    Cluster of Workstations",
  booktitle = "Parallel and Distributed Processing Techniques and Applications",
  year = "1999",
  url = "citeseer.nj.nec.com/245102.html" }

@inproceedings{ hu:IPPS99,
    author = "W. Hu and W. Shi and Z. Tang",
    title = "Reducing System Overheads in Home-based Software {DSM}s",
    booktitle = "Proc. of the Second Merged Symp. {IPPS}/{SPDP} 1999)",
    pages = "167-173",
    year = "1999",
    url = "citeseer.nj.nec.com/hu99reducing.html" }

@article{ hu+:Cluster01,
    author = "Weiwu Hu and Weisong Shi and Zhimin Tang",
    title = "Optimizing Home-Based Software {DSM} Protocols",
    journal = "Cluster Computing",
    volume = "4",
    number = "3",
    pages = "235-242",
    year = "2001",
    url = "citeseer.nj.nec.com/469619.html" }

@inproceedings{ hu+:WSDSM99,
    author = "W. Hu and W. Shi and Z. Tang",
    title = "Home Migration in Home-based Software {DSM}s",
    booktitle = "Proc. of the 1st Workshop on Software Distributed Shared Memory ({WSDSM}'99)",
    year = "1999",
    url = "citeseer.nj.nec.com/article/hu99home.html" }

@article{ hu+:JCST98a,
  author = "W. Hu and W. Shi and Z. Tang",
  title = "A Framework of Memory Consistency Models",
  journal = "Journal of Computer Science and Technology",
  volume = "13",
  number = "2",
  pages = "110-124",
  year = "1998",
  url = "citeseer.nj.nec.com/81907.html" }

@article{ hu+:JCST98b,
  author = "W. Hu and W. Shi and Z. Tang and M. Li",
  title = "A Lock-Based Cache Coherence Protocol for Scope Consistency",
  journal = "Journal of Computer Science and Technology",
  volume = "13",
  number = "2",
  pages = "97-110",
  year = "1998",
  url = "citeseer.nj.nec.com/137238.html" }

@inproceedings{ iftode+:SPAA96,
    author = "L. Iftode and J. P. Singh and K. Li",
    title = "Scope Consistency: {A} Bridge between Release Consistency and Entry Consistency",
    booktitle = "Proc. of the 8th {ACM} Annual Symp. on Parallel Algorithms and Architectures ({SPAA}'96)",
    pages = "277-287",
    year = "1996",
    url = "citeseer.nj.nec.com/iftode96scope.html" }

@article{ shi+:JCST99,
  author = "Weisong Shi and Weiwu Hu and Zhimin Tang",
  title = "Where Does the Time Go in Software DSM Systems: Experiences with JIAJIA?" }
  journal = "Journal of Computer Science and Technology"
  volume = 14,
  number = 3,
  month = may,
  year = 1999,
  pages = "193-205",
  url = "citeseer.nj.nec.com/shi99where.html" }

@inproceedings{ shi+:ICPDCS99,
  author = "W. Shi and Y. Mao and Z. Tang",
  title = "Communication Substrate for Home-based Software DSMs",
  booktitle = "11th IASTED International Conference on Parallel and Distributed Computing and Systems",
  year = "1999",
  url = "citeseer.nj.nec.com/256039.html" }

@misc{ cheung+:CC-TEA00,
  author = "B. Cheung and C. Wang and K. Hwang",
  title = "JUMP-DP: A Software DSM System with Low-Latency Communication Support",
  text = "B. W. L. Cheung, C. L. Wang and K. Hwang, JUMP-DP: A Software DSM System
    with Low-Latency Communication Support, in the 2000 International Workshop
    on Cluster Computing - Technologies, Environments and Applications (CC-TEA'2000),
    Las Vegas, Nevada, USA, June 2000.",
  year = "2000",
  url = "citeseer.nj.nec.com/cheung00jumpdp.html" }

@misc{JIAJIA-dist,
  author        = {{W. Shi and W. Hu and Z. Tang and M. Eskiciogiu}},
  title         = {{JIAJIA 2.2 distribution}},
  howpublished  = {http://www.cs.nyu.edu/~weisong/jia.2.2.tar.gz},
  note          = {}
}
@inproceedings{schulz:dsm02,
  author    = {{M. Schulz}},
  title     = {{Overcoming the Problems Associated with the Existence of Too Many DSM APIs}},
  URL       = {http://www.csl.cornell.edu/~schulz/papers/2002-05-ms-dsm.pdf},
  month     = {May},
  year      = {2002},
  pages     = {319},
  booktitle = {2nd IEEE/ACM International Symposium on Cluster Computing and the Grid (CCGRID'02)}
}
@inproceedings{schulz+:IPDPS03,
  author        = {{M. Schulz and S. McKee}},
  title         = {{A Framework for Portable Shared Memory Programming}},
  URL           = {http://www.csl.cornell.edu/~sam/papers/ipdps03.pdf},
  year          = {2003},
  booktitle     = {Proceedings of the International Parallel and Distributed Processing Symposium}
}
@book{hennessy+patterson:computer_organization_and_design,
  author    = {{Hennessy and Patterson}},
  title     = {{Computer Organization and Design: The Hardware / Software Interface}},
  edition   = {Second},
  pages     = {759},
  year      = {1998},
  publisher = {Morgan Kaufmann Publishers, Inc.}
}
@book{silberschatz:os-xp,
  author        = {{Silberschatz and Galvin and Gagne}},
  title         = {{Operating System Concepts}},
  edition       = {Sixth, XP},
  pages         = {951},
  year          = {2003},
  publisher     = {John Wiley and Sons, Inc.}
}
@manual{hu+:tr980002,
  author    = {{W. Hu and W. Shi and Z. Tang}},
  title     = {{The JIAJIA Software DSM System}},
  pages     = {123},
  year      = {1998},
  URL       = {http://www.ict.ac.cn/chpc/dsm/tr980002.ps}
}


%prototypes

@ARTICLE{article,
    AUTHOR = {},
    TITLE = {},
    JOURNAL = {},
    VOLUME = {},
    NUMBER = {},
    PAGES = {},
    MONTH = {},
    YEAR = 19}

@INBOOK{inbook,
    AUTHOR = {},
    TITLE = {},
    CHAPTER = {},
    PAGES = {},
    PUBLISHER = {},
    YEAR = {},
    VOLUME = {},
    SERIES = {},
    ADDRESS = {},
    EDITION = {},
    MONTH = {},
    NOTE = {}}

@CONFERENCE{conference,
    AUTHOR = {},
    TITLE = {},
    BOOKTITLE = {},
    PAGES = {},
    MONTH = {},
    YEAR =20}

@TECHREPORT{techreport,
    AUTHOR = {},
    TITLE = {},
    INSTITUTION = {},
    NUMBER = {},
    YEAR = 20}

@UNPUBLISHED{unpublished,
    AUTHOR = {},
    TITLE = {},
    NOTE = {},
    YEAR = 20,
    MONTH = {}}

@INCOLLECTION{incollection,
    AUTHOR = {},
    EDITOR = {},
    TITLE = {},
    BOOKTITLE = {},
    PAGES = {},
    YEAR = 19,
    PUBLISHER = {},
    SERIES = {},
    VOLUME = {},
    ADDRESS = {}}

@MANUAL{manual,
    TITLE = {},
    AUTHOR = {},
    ADDRESS = {},
    EDITION = {},
    MONTH = {},
    YEAR = 20}

@MISC{misc,
    AUTHOR = {},
    TITLE = {},
    HOWPUBLISHED = {}}

@ARTICLE{blindcite,
    AUTHOR = {Blind-Citation},
    TITLE = {},
    JOURNAL = {},
    VOLUME = {},
    NUMBER = {},
    PAGES = {},
    MONTH = {},
    YEAR = {}}


%%% perf monitor
@ARTICLE{lenoski+ieetc93,
    author = {D. Lenoski and J. Laudon and T. Joe and D. Nakahira and L. Stevens and A. Gupta and J. Hennessy},
    title = {{The DASH Prototype: Logic Overhead and Performance}},
    journal = IEEE-TPDS,
    volume = {4},
    number = {1},
    pages = {41-61},
    year = 1993,
}

@inproceedings{martonosi2+:sigmetrics96,
  title        = {{The SHRIMP Performance Monitor: Design and Applications}},
  author       = {Margaret Martonosi and Douglas W. Clark and Malena Mesarina},
  booktitle    = SIGMETRICS96,
  month        = {May},
  year         = {1996},
}

@INPROCEEDINGS{sasanka+:asplos02,
    AUTHOR = {R. Sasanka and C. J. Hughes and S. V. Adve},
    TITLE = {{Joint Local and Global Hardware Adaptations for Energy}},
    BOOKTITLE = ASPLOS10,
    MONTH = {October},
    YEAR = 2002
}

@INPROCEEDINGS{li+:islped03,
    AUTHOR = {Tao Li and Lizy K. John},
    TITLE = {{Routine based OS-aware Microprocessor Resource Adaptation for Run-time Operating System Power Saving}},
    BOOKTITLE = ISLPED03,
        PAGES = {241-246},
    MONTH = {August},
    YEAR = 2003
}

@inproceedings{shin+:dac01,
    AUTHOR = {D. Shin and J. Kim and S. Lee},
    TITLE = {Low-Energy Intra-Task Voltage Scheduling Using Static Timing Analysis},
    BOOKTITLE = DAC01,
    PAGES = {438-443},
    MONTH = {June},
    YEAR = 2001
}

@inproceedings{fleischmann:hotchips00,
    AUTHOR = {M. Fleischmann},
    TITLE = {{Crusoe Power Management: Cutting x86 Operating Power Through LongRun}},
    BOOKTITLE = HOTCHIPS00,
    MONTH = {June},
    YEAR = 2000
}

@INPROCEEDINGS{huang+:isca03,
        AUTHOR    = {M. Huang and J. Renau J. Torrellas},
        TITLE     = {Positional Processor Adaptation: Application to Energy Reduction},
        BOOKTITLE = ISCA03,
        YEAR      = 2003,
        MONTH     = jun,
        PAGES     = {157-168},
}

@misc{shin+:designtest02,
    author = {D. Shin and H. Shim and Y. Joo and H.-S. Yun and J. Kim and N. Chang},
    title  = {{Energy-Monitoring Tool for Low-Power Embedded Programs}},
    journal = {IEEE Design & Test of Computers},
    year   = {2002},
    volume = {19},
    number = {4},
    month ={July-August},
    pages  = {7-17}
}

@misc{octigabay:url03,
  title         = {{OctigaBay Systems}},
  howpublished  = {http://www.octigabay.com/},
  year          = 2003,
  note          = {}
}

@misc{SRC:url03,
  title        = {{SRC Computers, Inc.}},
  howpublished  = {http://www.srccomp.com/},
  year          = 2003,
  note          = {}
}

@ARTICLE{gte2004a,
AUTHOR = {},
TITLE = {{Attacks of Secure Software Executed on Tamper-resistance/Copy Protection System}},
JOURNAL = {Submitted for publication},
YEAR = { 2004 },
VOLUME = { },
PAGES = {  },
ANNOTE = {}     }


@ARTICLE{gte2004b,
AUTHOR = {  },
TITLE = {{M-TREE: A Fast Secure Architecture for Protecting the Integrity and Privacy of Software}},
JOURNAL = {Submitted for publication.http: //www.cc.gatech.edu/people/home/lulu/Mtree.pdf},
YEAR = { 2004 },
VOLUME = { },
PAGES = {  },
ANNOTE = {}     }
@inproceedings{806532,
 AUTHOR = {Ellis Cohen and David Jefferson},
 TITLE = {Protection in the Hydra Operating System},
 BOOKTITLE = {Proceedings of the fifth ACM symposium on Operating systems principles},
 YEAR = {1975},
 PAGES = {141--160},
 LOCATION = {Austin, Texas, United States},
 PUBLISHER = {ACM Press},
 }
@article{859502,
 author = {J. L. Keedy},
 title = {A technique for passing reference parameters in an information-hiding architecture},
 journal = {SIGARCH Comput. Archit. News},
 volume = {7},
 number = {9},
 year = {1979},
 issn = {0163-5964},
 pages = {11--15},
 doi = {http://doi.acm.org/10.1145/859500.859502},
 publisher = {ACM Press},
 }
 %
@inproceedings{806541,
 AUTHOR = {R. M. Needham and R. D.H. Walker},
 TITLE = {The Cambridge CAP computer and its protection system},
 BOOKTITLE = {Proceedings of the sixth ACM symposium on Operating systems principles},
 YEAR = {1977},
 PAGES = {1--10},
 LOCATION = {West Lafayette, Indiana, United States},
 PUBLISHER = {ACM Press},
 }
%
@ARTICLE{tcpa,
AUTHOR = { The Trusted Computing Platform Alliance },
TITLE = {https://www.trustedcomputinggroup.org/home},
JOURNAL = {  },
YEAR = { 2003 },
VOLUME = { },
PAGES = {  },
ANNOTE = {}     }
%
@ARTICLE{ngscb,
AUTHOR = { Next-Generation Secure Computing Base },
TITLE = { http://www.microsoft.com/resources/ngscb/default.mspx },
JOURNAL = {  },
YEAR = { },
VOLUME = { },
PAGES = {  },
ANNOTE = {}     }
%
@inproceedings{945464,
 AUTHOR = {Tal Garfinkel and Ben Pfaff and Jim Chow and Mendel Rosenblum and Dan Boneh},
 TITLE = {Terra: a virtual machine-based platform for trusted computing},
 BOOKTITLE = {Proceedings of the nineteenth ACM symposium on Operating systems principles},
 YEAR = {2003},
 ISBN = {1-58113-757-5},
 PAGES = {193--206},
 LOCATION = {Bolton Landing, NY, USA},
 DOI = {http://doi.acm.org/10.1145/945445.945464},
 PUBLISHER = {ACM Press},
 }
%
@inproceedings{884371,
 AUTHOR = {W. A. Arbaugh and D. J. Farber and J. M. Smith},
 TITLE = {{A Secure and Reliable Bootstrap Architecture}},
 BOOKTITLE = {Proceedings of the 1997 IEEE Symposium on Security and Privacy},
 YEAR = {1997},
 PAGES = {65},
 PUBLISHER = {IEEE Computer Society},
 }
 %
 @article{138874,
 AUTHOR = {Butler Lampson and Mart\&\#237;n Abadi and Michael Burrows and Edward Wobber},
 TITLE = {Authentication in distributed systems: theory and practice},
 JOURNAL = {ACM Trans. Comput. Syst.},
 VOLUME = {10},
 NUMBER = {4},
 YEAR = {1992},
 ISSN = {0734-2071},
 PAGES = {265--310},
 DOI = {http://doi.acm.org/10.1145/138873.138874},
 PUBLISHER = {ACM Press},
 }
%
@INPROCEEDINGS{sha256,
AUTHOR = {National Institute of Science and Technology},
TITLE={ FIPS PUB 180-2: SHA256 Hashing Algorithm},
BOOKTITLE = { },
YEAR = { },
PAGES = { },
ORGANIZATION = { },
PUBLISHER = {},
ADDRESS = { },
OFNOTE = {},
ANNOTE = {}     }
%
@inproceedings{168640,
 AUTHOR = {Edward Wobber and Mart\&\#237;n Abadi and Michael Burrows and Butler Lampson},
 TITLE = {Authentication in the Taos operating system},
 BOOKTITLE = {Proceedings of the fourteenth ACM symposium on Operating systems principles},
 YEAR = {1993},
 ISBN = {0-89791-632-8},
 PAGES = {256--269},
 LOCATION = {Asheville, North Carolina, United States},
 DOI = {http://doi.acm.org/10.1145/168619.168640},
 PUBLISHER = {ACM Press},
 }
%
@article{94579,
 AUTHOR = {Don Davis and Ralph Swick},
 TITLE = {Network security via private-key certificates},
 JOURNAL = {SIGOPS Oper. Syst. Rev.},
 VOLUME = {24},
 NUMBER = {4},
 YEAR = {1990},
 ISSN = {0163-5980},
 PAGES = {64--67},
 DOI = {http://doi.acm.org/10.1145/94574.94579},
 PUBLISHER = {ACM Press},
 }
%
@article{138874,
 AUTHOR = {Butler Lampson and Mart\&\#237;n Abadi and Michael Burrows and Edward Wobber},
 TITLE = {Authentication in distributed systems: theory and practice},
 JOURNAL = {ACM Trans. Comput. Syst.},
 VOLUME = {10},
 NUMBER = {4},
 YEAR = {1992},
 ISSN = {0734-2071},
 PAGES = {265--310},
 DOI = {http://doi.acm.org/10.1145/138873.138874},
 PUBLISHER = {ACM Press},
 }
%
@article{138874,
 AUTHOR = {Butler Lampson and Mart\&\#237;n Abadi and Michael Burrows and Edward Wobber},
 TITLE = {Authentication in distributed systems: theory and practice},
 JOURNAL = {ACM Trans. Comput. Syst.},
 VOLUME = {10},
 NUMBER = {4},
 YEAR = {1992},
 ISSN = {0734-2071},
 PAGES = {265--310},
 DOI = {http://doi.acm.org/10.1145/138873.138874},
 PUBLISHER = {ACM Press},
 }
 %
@Misc{aes,
  AUTHOR =       "Federal Information Processing Standard Draft",
  TITLE =        {{Advanced Encryption Standard (AES). National Institute of Standards and Technology}},
  MONTH =        "",
  YEAR =         {2001},
  NOTE =         "",
  URL =          ""
}
@Misc{RFC3280,
  AUTHOR =       "Russell Housley and Tim Polk and Warwick Ford and David Solo",
  TITLE =        "Internet X.509 Public Key Infrastructure Certificate and Certificate Revocation List (CRL) Profile",
  MONTH =        "April",
  YEAR =         {2002},
  NOTE =         "Available from http://kaizi.viagenie.qc.ca/ietf/rfc/rfc3280.txt",
  URL =          "http://kaizi.viagenie.qc.ca/ietf/rfc/rfc3280.txt"
}
%
@TECHREPORT{rfc2459,
AUTHOR="R. Housley and W. Ford and W. Polk and D. Solo",
TITLE="{Internet} {X.509} Public Key Infrastructure Certificate and
{CRL} Profile",
TYPE="RFC",
INSTITUTION="Internet Engineering Task Force",
NUMBER=2459,
PAGES=129,
DAYS=15,
MONTH=jan,
YEAR=1999,
ABSTRACT="This memo profiles the X.509 v3 certificate and X.509 v2 CRL
for use in the Internet. An overview of the approach and model are
provided as an introduction. The X.509 v3 certificate format is
described in detail, with additional information regarding the format
and semantics of Internet name forms (e.g., IP addresses). Standard
certificate extensions are described and one new Internet-specific
extension is defined. A required set of certificate extensions is
specified. The X.509 v2 CRL format is described and a required extension
set is defined as well. An algorithm for X.509 certificate path
validation is described. Supplemental information is provided describing
the format of public keys and digital signatures in X.509 certificates
for common Internet public key encryption algorithms (i.e., RSA, DSA,
and Diffie-Hellman). ASN.1 modules and examples are provided in the
appendices.",
URL="http://www.rfc-editor.org/rfc/rfc2459.txt",
}
%
@book{certificates,
  author    = {{Carlisle Adams, Steve Lloyd, and Stephen Kent}},
  title     = {{Understanding the Public-Key Infrastructure: Concepts, Standards, and Deployment Considerations. }},
  edition   = {},
  pages     = {},
  year      = {1999},
  publisher = {New Riders Publishing}
}
%
%
@ARTICLE{andrew2002,
AUTHOR = { A. Huang },
TITLE = { Keeping Secrets in Hardware the Microsoft XBOX Case Study },
JOURNAL = { MIT AI Memo },
YEAR = { 2002 },
VOLUME = { },
PAGES = {  },
ANNOTE = {}     }
%
% new references
%
@ARTICLE{sander1998,
AUTHOR = { T.Sander and C. Tschudin },
TITLE = { Protecting Mobile Agents Against Malicious Hosts },
JOURNAL = { Mobile Agents and Security. LNCS },
YEAR = { Feb, 1998 },
VOLUME = { },
PAGES = {  },
ANNOTE = {}     }
%
%
%
@ARTICLE{montgomery,
AUTHOR = { D.C. Montgomery },
TITLE = { Introduction to Linear Regression Analysis },
JOURNAL = { Wiley, New York },
YEAR = { 2001 },
VOLUME = { },
PAGES = {  },
ANNOTE = {}     }

%
%
@ARTICLE{Ferrari,
AUTHOR = { G. Ferrari-Trecate and M. Muselli },
TITLE = { A new learning method for piecewise linear regression },
JOURNAL = { International Conference on Artificial Neural Networks },
YEAR = {  (ICANN02), 2002. Madrid },
VOLUME = { },
PAGES = {  },
ANNOTE = {}     }
%
%
@article{207284,
 AUTHOR = {Hava T. Siegelmann and Eduardo D. Sontag},
 TITLE = {On the computational power of neural nets},
 JOURNAL = {J. Comput. Syst. Sci.},
 VOLUME = {50},
 NUMBER = {1},
 YEAR = {1995},
 ISSN = {0022-0000},
 PAGES = {132--150},
 DOI = {http://dx.doi.org/10.1006/jcss.1995.1013},
 PUBLISHER = {Academic Press, Inc.},
 }
%
%
%
@article{148160,
 AUTHOR = {C. L. Giles and C. B. Miller and D. Chen and H. H. Chen and G. Z. Sun and Y. C. Lee},
 TITLE = {Learning and extracting finite state automata with second-order recurrent neural networks},
 JOURNAL = {Neural Comput.},
 VOLUME = {4},
 NUMBER = {3},
 YEAR = {1992},
 ISSN = {0899-7667},
 PAGES = {393--405},
 PUBLISHER = {MIT Press},
 }
%
%
%
%
@ARTICLE{arium,
AUTHOR = { Interposer },
TITLE = { http://www.arium.com },
JOURNAL = {  },
YEAR = { },
VOLUME = { },
PAGES = {  },
ANNOTE = {}     }
%
%
@article{martin,
 AUTHOR = {M.Anthony},
 TITLE = {Boolean Functions and Artificial Neural Networks},
 JOURNAL = {Boolean Functions: Volume II. Ed. Yves Crama and Peter Hammer},
 VOLUME = {},
 NUMBER = {},
 YEAR = {December, 2003 },
 ISSN = {},
 PAGES = {},
 PUBLISHER = {DevelopmentSpringer - Verlag},
 }
%
%
@article{narendra,
 AUTHOR = {N.S. Chaudhari and A. Tiwari},
 TITLE = {Extension of Binary Neural Networks for Multi-class Output and Finite Automata},
 JOURNAL = {Neural Information Processing: Research and Development. Ed. Jagath Rakjkapse and Lipo Wang},
 VOLUME = {},
 NUMBER = {},
 YEAR = {December, 2003 },
 ISSN = {},
 PAGES = {},
 PUBLISHER = {DevelopmentSpringer - Verlag},
 }
%
@article{Biham2002,
 author = {Eli Biham},
 title = {How to decrypt or even substitute DES-Encrypted messages in 228 steps},
 journal = {Inf. Process. Lett.},
 volume = {84},
 number = {3},
 year = {2022},
 issn = {0020-0190},
 pages = {117--124},
 doi = {http://dx.doi.org/10.1016/S0020-0190(02)00269-7},
 publisher = {Elsevier North-Holland, Inc.},
 }
%
@CONFERENCE{anthony99,
  author = {M. Anthony and P.L. Bartlett},
  year = 1999,
  title = {{Neural Network Learning: Theoretical Foundations.}},
  booktitle = {Cambridge University Press}
}
%
@techreport{mesa2004,
    author        = {Weidong Shi and Hsien-Hsin S. Lee and Chenghuai Lu and Mrinmoy Ghosh},
    title         = {{High Speed Memory Centric Protection on Software Execution Using One-Time-Pad Prediction}},
    institution   = {Geogia Institute of Technology},
    year          = {2004},
    type          = {Report},
    number        = {GIT-CERCS-04-27},
    address       = {Atlanta, GA},
    month         =  jul,
    note          = {}
}
%
@article{palladium:3,
author = {Paul England and Butler Lampson and John Manferdelli and Marcus Peinado and Bryan Willman},
title = "A Trusted Open Platform",
month = jul,
year = 2003,
journal = {{IEEE} Computer Magazine},
pages = {55--62}
}
@misc{Pritchard,
    author        = {Matt Pritchard},
    title         = {{How to Hurt the Hackers: The Scoop on Internet Cheating and How You Can Combat It}},
    howpublished  = {http://www.gamasutra.com/features/20000724/pritchard01.htm},
    month         = {},
    year          = {},
    note          = {}
}
%%%%%%%%% NEW
@techreport{hide2003,
    author        = {X. Zhuang and T. Zhang and S. Pande and H.-H. S. Lee},
    title         = {{HIDE: Hardware-support for Leakage-Immune Dynamic Execution}},
    institution   = {Geogia Institute of Technology},
    year          = {2003},
    type          = {Report},
    number        = {GIT-CERCS-03-21},
    address       = {Atlanta, GA},
    month         = nov,
    note          = {}
}
%
@CONFERENCE{zhuang2004,
  author = {X. Zhuang and T. Zhang and H.-H. S. Lee and S. Pande},
  year = 2004,
  title = {{Hardware Assisted Control Flow Obfuscation for Embedded Processors}},
  booktitle = {Proceedings of the International Conference on Compilers, Architecture, Synthesis for Embedded Systems}
}
%
@CONFERENCE{andrew1999,
  author = {A. C. Myers},
  year = 1999,
  title = {{JFlow: Practical Mostly-Static Information Flow Control}},
  booktitle = {Proceedings of the 26th ACM Symposium on Principles of Programming Languages}
}
%
@CONFERENCE{Biermann1978,
  author = {A. W. Biermann},
  year = 1978,
  title = {{The inference of regular lisp programs from examples}},
  booktitle = {IEEE Trans. on Systems, Man, and Cybernetics, 8(8):585-600}
}
%
@inproceedings{988963,
author = {F. K. Gu\&\#252;rkaynak and A. Burg and N. Felber and W. Fichtner and D. Gasser and F. Hug and H. Kaeslin},
title = {A 2 Gb/s balanced AES crypto-chip implementation},
booktitle = {Proceedins of the 14th ACM Great Lakes symposium on VLSI},
year = {2004},
isbn = {1-58113-853-9},
pages = {39--44},
location = {Boston, MA, USA},
doi = {http://doi.acm.org/10.1145/988952.988963},
publisher = {ACM Press},
}
%
@CONFERENCE{lipmaa2000,
  author = {H. Lipmaa and P. Rogaway and D. Wagner},
  year = 2000,
  title = {{Comments to NIST Concerning AES-modes of Operations: CTR-mode Encryption}},
  booktitle = {In Symmetric Key Block Cipher Modes of Operation Workshop, Baltimore, Maryland, US}
}
%
@CONFERENCE{diffie1979,
  author = {W. Diffie and M. Hellman},
  year = 1979,
  title = {{Privacy and Authentication: An Introduction to Cryptography}},
  booktitle = {Proceedings of the IEEE, 67}
}
%
@inproceedings{118230,
 author = {Ralph C. Merkle},
 title = {A certified digital signature},
 booktitle = {Proceedings on Advances in cryptology},
 year = {1989},
 isbn = {0-387-97317-6},
 pages = {218--238},
 location = {Santa Barbara, California, United States},
 publisher = {Springer-Verlag New York, Inc.},
 }
 %
@inproceedings{issue2004,
 author = {Weidong Shi and Hsien-Hsin S. Lee and Chenghuai Lu and Mrinmoy Ghosh},
 title = {{Towards the Issues in Architectural Support for Protection of Software
Execution}},
 booktitle = {Workshop on Architectural support for Security and Anti-Virus},
 year = {2004},
 pages = {1--10}
 }

%
%
@INPROCEEDINGS{matthias,
AUTHOR = {Matthias Gries and Andreas Romer.},
TITLE = {{Performance Evaluation of Recent Dram Architectures for Embedded Systems}},
BOOKTITLE = { TIK Report Nr. 82, Computing Engineering and Networks Lab (TIK), Swiss Federal Institute of Technology (ETH) Zurich },
YEAR = { November 1999 },
PAGES = { },
ORGANIZATION = { },
PUBLISHER = {},
ADDRESS = { },
OFNOTE = {},
ANNOTE = {}     }
%
@inproceedings{796360,
 author = {Mihir Bellare and Anand Desai and Eron Jokipii and Phillip Rogaway},
 title = {{A Concrete Security Treatment of Symmetric Encryption}},
 booktitle = {Proceedings of the 38th Annual Symposium on Foundations of Computer Science},
 year = {1997},
 isbn = {0-8186-8197-7},
 pages = {394},
 publisher = {IEEE Computer Society},
 }
%
%
@article{581894,
 author = {Jun Yang and Rajiv Gupta},
 title = {{Frequent Value Locality and its Applications}},
 journal = {ACM Transactions on Embedded Computing Systems},
 volume = {1},
 number = {1},
 year = {2002},
 pages = {79--105},
 month = {November},
 doi = {http://doi.acm.org/10.1145/581888.581894},
 publisher = {ACM Press},
 }
%
%
@inproceedings{237173,
 author = {Mikko H. Lipasti and Christopher B. Wilkerson and John Paul Shen},
 title = {{Value Locality and Load Value Prediction}},
 booktitle = {Proceedings of the seventh international conference on Architectural support for programming languages and operating systems},
 year = {1996},
 isbn = {0-89791-767-7},
 pages = {138--147},
 location = {Cambridge, Massachusetts, United States},
 doi = {http://doi.acm.org/10.1145/237090.237173},
 publisher = {ACM Press},
 }
%
%
@article{937529,
 author = {Phillip Rogaway and Mihir Bellare and John Black},
 title = {OCB: A block-cipher mode of operation for efficient authenticated encryption},
 journal = {ACM Trans. Inf. Syst. Secur.},
 volume = {6},
 number = {3},
 year = {2003},
 issn = {1094-9224},
 pages = {365--403},
 doi = {http://doi.acm.org/10.1145/937527.937529},
 publisher = {ACM Press},
 }
%
%
@inproceedings{ rogaway01ocb,
    author = "Phillip Rogaway and Mihir Bellare and John Black and Ted Krovetz",
    title = "{OCB}: a block-cipher mode of operation for efficient authenticated encryption",
    booktitle = "{ACM} Conference on Computer and Communications Security",
    pages = "196-205",
    year = "2001",
    url = "citeseer.ist.psu.edu/article/rogaway01ocb.html" }
%
%
@misc{ rogaway00ocb,
  author = "P. Rogaway",
  title = {{OCB Mode: Parallelizable Authenticated Encryption}},
  text = "P. Rogaway. OCB mode: Parallelizable authenticated encryption. presented
    in NIST's workshop on modes of operations, in October, 2000. See http://csrc.nist.gov/encryption/modes/workshop1/.",
  year = "2000",
  url = "citeseer.ist.psu.edu/rogaway00ocb.html" }
%
%
@misc{ rogaway-proposal,
  author = "Phillip Rogaway",
  title = {{Proposal to NIST for a Block-cipher Mode of Operation which Simultaneously Provides Privacy and Authenticity}},
  url = "citeseer.ist.psu.edu/article/rogaway01proposal.html" }
%
%
@inproceedings{ chen92reducing,
    author = "Tien-Fu Chen and Jean-Loup Baer",
    title = {{Reducing Memory Latency via Non-blocking and Prefetching Caches}},
    booktitle = "Proceedings of the 5th International Conference on Architectural Support for Programming Languages and Operating System)",
    journal = "SIGPLAN Notices",
    volume = "27",
    number = "9",
    publisher = "ACM Press",
    address = "New York, NY",
    isbn = "0-89791-534-8",
    pages = "51--61",
    year = "1992",
    url = "citeseer.ist.psu.edu/chen92reducing.html" }
%
%
@article{627012,
 author = {Jean-Loup Baer and Tien-Fu Chen},
 title = {{Effective Hardware-Based Data Prefetching for High-Performance Processors}},
 journal = {IEEE Transactions on Computers},
 volume = {44},
 number = {5},
 year = {1995},
 issn = {0018-9340},
 pages = {609--623},
 doi = {http://dx.doi.org/10.1109/12.381947},
 publisher = {IEEE Computer Society},
 }
%
%
@article{358939,
 author = {Steven P. Vanderwiel and David J. Lilja},
 title = {{Data Prefetch Mechanisms}},
 journal = {ACM Computing Surveys},
 volume = {32},
 number = {2},
 year = {2000},
 pages = {174--199},
 }
%
%
@misc{ wang03guided,
  author = {Zhenlin Wang and Doug Burger and Kathryn S. McKinley and Steven K. Reinhardt
    and Charles C. Weems},
  title = {{Guided Region Prefetching: A Cooperative Hardware/Software Approach}},
  pages ={388-397},
  year = "2003",
  url = "citeseer.ist.psu.edu/598342.html"
}
%
%
@article{tdea,
 author = {National Institude of Standards and Technology},
 title = {Recommendation for the Triple Data Encryption Algorithm (TDEA) Block Cipher},
 journal = {SP-800-67, NIST, Mar.},
 year = {2004}
 }
%
%
@article{358718,
 author = {Ralph C. Merkle and Martin E. Hellman},
 title = {On the security of multiple encryption},
 journal = {Commun. ACM},
 volume = {24},
 number = {7},
 year = {1981},
 issn = {0001-0782},
 pages = {465--467},
 doi = {http://doi.acm.org/10.1145/358699.358718},
 publisher = {ACM Press},
 }
%
%
@article{ eberle93highspeed,
    author = "Hans Eberle",
    title = "A High-Speed {DES} Implementation for Network Applications",
    journal = "Lecture Notes in Computer Science",
    volume = "740",
    pages = "521--539",
    year = "1993"
    }

%
%
%

%
% ===========================================
% HARNESS
%
@InProceedings{stackguard, author = {Crispin Cowan and Calton Pu and Dave Maier and Heather Hinton and Jonathan Walpole and Peat Bakke and Steve Beattie and Aaron Grier and Perry Wagle and Qian Zhang}, title = {StackGuard: Automatic Adaptive Detection and Prevention of Buffer-Overflow Attacks}, booktitle = {7th USENIX Security Symposium }, year = 1998, address = {San Antonio, Texas}, month = jan }

@InProceedings{CyclonePLDI, AUTHOR = {Dan Grossman and Greg Morrisett and Trevor Jim and Michael Hicks and Yanling Wang and James Cheney}, TITLE = {Region-based Memory Management in {C}yclone}, BOOKTITLE = {Proceedings of the {ACM} Conference on Programming Language Design and Implementation}, MONTH = {June}, WHERE = {Berlin, Germany}, PUBLISHER = {{ACM}}, YEAR = 2002 }
@inproceedings{safec-pldi, author = {Todd M. Austin and Scott E. Breach and Gurindar S. Sohi}, title = {Efficient Detection of All Pointer and Array Access Errors}, booktitle = pldi, year = 1994, pages = {290--301}, month = jun } @inproceedings{ccured, author = "George C. Necula and Scott McPeak and Westley Weimer", title = "{CCured}: Type-Safe Retrofitting of Legacy Code", booktitle = twentyninth # popl, year = 2002, month = jan, address = "Portland, OR", note = "To appear." }
@InProceedings{formatguard, author = {Crispin Cowan and Matt Barringer and Steve Beattie and Greg Kroah-Hartman}, title = {FormatGuard: Automatic Protection From printf Format String Vulnerabilities}, booktitle = {10th USENIX Security Symposium }, year = 2001, address = {Washington, D.C.}, month = aug }
@InProceedings{lclintoverflow, author = {David Larochelle and David Evans }, title = {Statically Detecting Likely Buffer Overflow Vulnerabilities}, booktitle = {10th USENIX Security Symposium }, year = 2001, address = {Washington, D.C.}, month = aug }
@InProceedings{libsafe, author = {Arash Baratloo and Navjot Singh and Timothy Tsai}, title = {Transparent Run-Time Defense Against Stack-Smashing Attacks}, booktitle = {USENIX Annual 2000 Technical Conference}, year = 2000, address = {San Diego, California}, month = jun }
@inproceedings{Hastings:91, AUTHOR = {R. Hastings and B. Joyce}, TITLE = {Purify: Fast Detection of Memory Leaks and Access Errors}, YEAR = 1991, BOOKTITLE = {Proc.\ of the Winter 1992 USENIX Conference}, ADDRESS = {San Francisco, California}, PAGES = {125-138}, KEYWORDS = {}}
@INPROCEEDINGS{kirian:02, AUTHOR = {V. Kiriansky and D. Bruening and S. Amarasinghe}, BOOKTITLE = {Proc. of the 11th {USENIX} Security Symposium}, KEYWORDS = {program flow control}, MONTH = {Aug}, TITLE = {Secure Execution Via Program Shepherding}, URL = {<http://www.usenix.org/publications/library/proceedings/sec02/full_papers/kiriansky/kiriansky.pdf>}, YEAR = {2002} }

@INPROCEEDINGS{dunlap:02, AUTHOR = {G.W. Dunlap and S.T. King and S. Cinar and M.A. Basrai and P.M. Chen}, BOOKTITLE = {Proc. of the 2002 Symposium on Operating Systems Design and Implementation}, KEYWORDS = {intrusion detection}, MONTH = {Dec}, TITLE = {{ReVirt}: {Enabling} Intrusion Analysis through Virtual-Machine Logging and Replay}, URL = {<http://www.eecs.umich.edu/CoVirt/papers/revirt.pdf>}, YEAR = {2002} }

@ARTICLE{aleph:96, ABSTRACT = {Over the last few months there has been a large increase of buffer{\newline}overflow vulnerabilities being both discovered and exploited. Examples{\newline}of these are syslog, splitvt, sendmail 8.7.5, Linux/FreeBSD mount, Xt {\newline}library, at, etc. This paper attempts to explain what buffer overflows {\newline}are, and how their exploits work.{\par}Basic knowledge of assembly is required. An understanding of virtual {\newline}memory concepts, and experience with gdb are very helpful but not necessary.{\newline}We also assume we are working with an Intel x86 CPU, and that the operating {\newline}system is Linux.{\par}Some basic definitions before we begin: A buffer is simply a contiguous {\newline}block of computer memory that holds multiple instances of the same data {\newline}type. C programmers normally associate with the word buffer arrays. Most {\newline}commonly, character arrays. Arrays, like all variables in C, can be {\newline}decl!
 ared either static or dynamic. Static variables are allocated at load {\newline}time on the data segment. Dynamic variables are allocated at run time on {\newline}the stack. To overflow is to flow, or fill over the top, brims, or bounds. {\newline}We will concern ourselves only with the overflow of dynamic buffers, otherwise{\newline}known as stack-based buffer overflows.}, AUTHOR = {{Aleph One}}, JOURNAL = {Phrack}, KEYWORDS = {code-injection attack}, MONTH = {November}, NUMBER = {49}, TITLE = {Smashing The Stack For Fun And Profit}, URL = {<http://www.phrack.org/phrack/49/P49-14>}, VOLUME = {7}, YEAR = {1996} }

@INPROCEEDINGS{kc:03, AUTHOR = {G.S. Kc and A.D. Keromytis and V. Prevelakis}, BOOKTITLE = {Proc. of the 10th {ACM} Conference on Computer and Communications Security}, MONTH = {Oct}, TITLE = {Countering Code-Injection Attacks with Instruction-Set Randomization}, YEAR = {2003} }
@INPROCEEDINGS{barat:00, AUTHOR = {A. Baratloo and N. Singh and T. Tsai}, BOOKTITLE = {Proc. of the 2000 {USENIX} Annual Technical Conference}, KEYWORDS = {buffer-overflow prevention, buffer-overflow detection}, MONTH = {Jun}, TITLE = {Transparent Run-Time Defense Against Stack Smashing Attacks}, URL = {<http://www.usenix.org/publications/library/proceedings/usenix2000/general/full_papers/baratloo/baratloo.pdf>}, YEAR = {2000} }

@INPROCEEDINGS{fetzer:01, AUTHOR = {C. Fetzer and Z. Xiao}, BOOKTITLE = {Proc. of the {IEEE} Symposium on Reliable Distributed Systems}, KEYWORDS = {buffer-overflow prevention}, MONTH = {Oct}, TITLE = {Detecting Heap Buffer Overflow Through Fault Containment Wrappers}, URL = {<http://www.research.att.com/~christof/papers/preprint-SRDS2001.pdf>}, YEAR = {2001} }

@InProceedings{Rinard04-OSDI,
           title = "{Enahceing Server Availability and Security Through Failure-oblivious Computing}",
          author = "M. Rinard and C. Cadar and D. Dumitran and D. Roy and T. Leu and J.W. Beebee",
       booktitle = "Proceedings of the Sixth Symposium on Operating Systems Design and Implementation (OSDI '04)",
           month = "December",
            year = "2004",
         address = "San Francisco, CA",
}

@inproceedings{939795,
 author = {Stelios Sidiroglou and Angelos D. Keromytis},
 title = {A Network Worm Vaccine Architecture},
 booktitle = {Proceedings of the Twelfth International Workshop on Enabling Technologies},
 year = {2003},
 isbn = {0-7695-1963-6},
 pages = {220},
 publisher = {IEEE Computer Society},
 }

@techreport{Stelios04,
    author        = {Stelios Sidiroglou and Michael E. Locasto and Stephen W. Boyd and Angelos D. Keromytis},
    title         = {{Building a Reactive Immune System for Software Services }},
    institution   = {Columbia University},
    year          = {2004},
    type          = {Report},
    number        = {CUCS-038-04},
    address       = {Newyork, NY},
    month         = {},
    note          = {}
}

@InProceedings{Suh04-Asplos, title = "{Secure Program Execution via Dynamic Information Flow Tracking}", author = "G.E. Suh and J. Lee and S. Devadas ", booktitle = "Architectural Support for Programming Languages and Operating Systems", pages = "", month = "October", year = "2004", address = "Boston, MA", }
@InProceedings{Jedi04-micro, title = "{ Minos: Control Data Attack Prevention Orthogonal to Memory Model}", author = "Jedidiah R. Crandall and Frederic T. Chong ", booktitle = "37th International Symposium on Microarchitecture", pages = "", month = "Dec", year = "2004", address = "Portland, Oregon", }
@InProceedings{baker04, title = "{Beyond Stack Smashing: Recent Advances in Exploiting Buffer Overruns }", author = "Jonathan Pincus and Brandon Baker", booktitle = "IEEE Security and Privacy, 2(4)", pages = "20-27", month = "", year = "2004", address = "", }
@InProceedings{rfile04, title = "{Beyond Stack Smashing: Recent Advances in Exploiting Buffer Overruns }", author = "Jonathan Pincus and Brandon Baker", booktitle = "IEEE Security and Privacy, 2(4)", pages = "20-27", month = "", year = "2004", address = "", }

%
% information usage
%
%
%
% exploits
@ARTICLE{loss,
AUTHOR = { Cyber Crime},
TITLE = {http://www.ssg-inc.net/cyber\_crime/cyber\_crime.html},
JOURNAL = {  },
YEAR = {},
VOLUME = { },
PAGES = {  },
ANNOTE = {}     }
%
@ARTICLE{hybris,
AUTHOR = { Hybris },
TITLE = {http://securityresponse.symantec.com/avcenter/venc/data/ w95.hybris.worm.html },
JOURNAL = {  },
YEAR = {},
VOLUME = { },
PAGES = {  },
ANNOTE = {}     }
%

@ARTICLE{happy99,
AUTHOR = { Happy99.worm },
TITLE = {http://securityresponse.symantec.com/avcenter/\\venc/data/happy99.worm.html},
JOURNAL = {  },
YEAR = {},
VOLUME = { },
PAGES = {  },
ANNOTE = {}     }
%
@ARTICLE{iepw,
AUTHOR = { Padodor },
TITLE = {http://www.viruslibrary.com/virusinfo/Backdoor.Padodor.w.htm},
JOURNAL = {  },
YEAR = {},
VOLUME = { },
PAGES = {  },
ANNOTE = {}     }
%
@ARTICLE{boa,
AUTHOR = { Backdoor.BO.a},
TITLE = {http://www.viruslibrary.com/virusinfo/Backdoor.BO.a.htm},
JOURNAL = {  },
YEAR = {},
VOLUME = { },
PAGES = {  },
ANNOTE = {}     }
%
@ARTICLE{Phreaker,
AUTHOR = {Phreaker},
TITLE = {http://www.viruslibrary.com/virusinfo/Trojan.PSW.Phreaker.htm},
JOURNAL = {  },
YEAR = {},
VOLUME = { },
PAGES = {  },
ANNOTE = {}     }
%
@ARTICLE{widget,
AUTHOR = {Widget},
TITLE = {http://www.viruslibrary.com/virusinfo/Trojan.PSW.Widget.htm},
JOURNAL = {  },
YEAR = {},
VOLUME = { },
PAGES = {  },
ANNOTE = {}     }
%
@ARTICLE{avron,
AUTHOR = { Avron },
TITLE = {http://www.viruslibrary.com/virusinfo/I-Worm.Avron.a.htm},
JOURNAL = {  },
YEAR = {},
VOLUME = { },
PAGES = {  },
ANNOTE = {}     }
%
@ARTICLE{trunlow,
AUTHOR = {Trunlow},
TITLE = {http://securityresponse.symantec.com/avcenter/venc/data/trojan.trunlow.html},
JOURNAL = {  },
YEAR = {},
VOLUME = { },
PAGES = {  },
ANNOTE = {}     }
%
@ARTICLE{Webmoney,
AUTHOR = {Webmoney},
TITLE = {http://www.viruslibrary.com/virusinfo/\\Trojan.WebMoney.Wmpatch.htm},
JOURNAL = {  },
YEAR = {},
VOLUME = { },
PAGES = {  },
ANNOTE = {}     }
%
@ARTICLE{lirva,
AUTHOR = {Lirva},
TITLE = {http://securityresponse1.symantec.com/sarc/\\sarc.nsf/html/w32.lirva.a@mm.html},
JOURNAL = {  },
YEAR = {},
VOLUME = { },
PAGES = {  },
ANNOTE = {}     }
%
@ARTICLE{abhishek04,
AUTHOR = {Abhishek Kumar},
TITLE = {Discovering passwords in the memory},
JOURNAL = { http://www.infosecwriters.com/text\_resources/  },
YEAR = { 2004},
VOLUME = { },
PAGES = {  },
ANNOTE = {}     }
%
@ARTICLE{spy,
AUTHOR = {Brian Friesen},
TITLE = {PasswordSpy - Retrieving lost passwords using Windows hooks},
JOURNAL = { http://www.codeproject.com/ },
YEAR = {},
VOLUME = { },
PAGES = {  },
ANNOTE = {}     }
%
@ARTICLE{hooks,
AUTHOR = {Ivo Ivanov },
TITLE = {API hooking revealed},
JOURNAL = {http://www.codeproject.com/  },
YEAR = {},
VOLUME = { },
PAGES = {  },
ANNOTE = {}     }
%
@ARTICLE{macformat,
AUTHOR = {CAN-2004-0165},
TITLE = {http://www.atstake.com/research/advisories/2004/a022304-1.txt},
JOURNAL = {  },
YEAR = {},
VOLUME = { },
PAGES = {  },
ANNOTE = {}     }
%
@ARTICLE{uimove,
AUTHOR = {GENERIC-MAP-NOMATCH},
TITLE = {http://cve.mitre.org/cgi-bin/cvename.cgi?name=GENERIC-MAP-NOMATCH},
JOURNAL = {  },
YEAR = {},
VOLUME = { },
PAGES = {  },
ANNOTE = {}     }
%
@ARTICLE{64bit,
AUTHOR = {CAN-2004-0415},
TITLE = {http://isec.pl/vulnerabilities/isec-0016-procleaks.txt},
JOURNAL = {  },
YEAR = {},
VOLUME = { },
PAGES = {  },
ANNOTE = {}     }
%
@ARTICLE{e1000,
AUTHOR = {CAN-2004-0535},
TITLE = {http://cve.mitre.org/cgi-bin/cvename.cgi?name=CAN-2004-0535},
JOURNAL = {  },
YEAR = {},
VOLUME = { },
PAGES = {  },
ANNOTE = {}     }
%
@ARTICLE{Scut01,
AUTHOR = {Scut},
TITLE = {Exploiting Format String Vulnerabilities},
JOURNAL = {  },
YEAR = {2001},
VOLUME = { },
PAGES = {  },
ANNOTE = {}     }
%
%
@inproceedings{502041,
 author = {Dawson Engler and David Yu Chen and Seth Hallem and Andy Chou and Benjamin Chelf},
 title = {Bugs as deviant behavior: a general approach to inferring errors in systems code},
 booktitle = {Proceedings of the eighteenth ACM symposium on Operating systems principles},
 year = {2001},
 isbn = {1-58113-389-8},
 pages = {57--72},
 location = {Banff, Alberta, Canada},
 doi = {http://doi.acm.org/10.1145/502034.502041},
 publisher = {ACM Press},
 }

@article{359493,
 author = {Anita K. Jones and Barbara H. Liskov},
 title = {A language extension for expressing constraints on data access},
 journal = {Commun. ACM},
 volume = {21},
 number = {5},
 year = {1978},
 issn = {0001-0782},
 pages = {358--367},
 doi = {http://doi.acm.org/10.1145/359488.359493},
 publisher = {ACM Press},
 }
@article{363526,
 author = {Andrew C. Myers and Barbara Liskov},
 title = {Protecting privacy using the decentralized label model},
 journal = {ACM Trans. Softw. Eng. Methodol.},
 volume = {9},
 number = {4},
 year = {2000},
 issn = {1049-331X},
 pages = {410--442},
 doi = {http://doi.acm.org/10.1145/363516.363526},
 publisher = {ACM Press},
 }

@article{319345,
 author = {Greg Morrisett and David Walker and Karl Crary and Neal Glew},
 title = {From system F to typed assembly language},
 journal = {ACM Trans. Program. Lang. Syst.},
 volume = {21},
 number = {3},
 year = {1999},
 issn = {0164-0925},
 pages = {527--568},
 doi = {http://doi.acm.org/10.1145/319301.319345},
 publisher = {ACM Press},
 }


@article{359712,
 author = {Dorothy E. Denning and Peter J. Denning},
 title = {Certification of programs for secure information flow},
 journal = {Commun. ACM},
 volume = {20},
 number = {7},
 year = {1977},
 issn = {0001-0782},
 pages = {504--513},
 doi = {http://doi.acm.org/10.1145/359636.359712},
 publisher = {ACM Press},
 }
@article{360056,
 author = {Dorothy E. Denning},
 title = {A lattice model of secure information flow},
 journal = {Commun. ACM},
 volume = {19},
 number = {5},
 year = {1976},
 issn = {0001-0782},
 pages = {236--243},
 doi = {http://doi.acm.org/10.1145/360051.360056},
 publisher = {ACM Press},
 }
@inproceedings{268976,
 author = {Nevin Heintze and Jon G. Riecke},
 title = {The SLam calculus: programming with secrecy and integrity},
 booktitle = {Proceedings of the 25th ACM SIGPLAN-SIGACT symposium on Principles of programming languages},
 year = {1998},
 isbn = {0-89791-979-3},
 pages = {365--377},
 location = {San Diego, California, United States},
 doi = {http://doi.acm.org/10.1145/268946.268976},
 publisher = {ACM Press},
 }

@inproceedings{268975,
 author = {Geoffrey Smith and Dennis Volpano},
 title = {Secure information flow in a multi-threaded imperative language},
 booktitle = {Proceedings of the 25th ACM SIGPLAN-SIGACT symposium on Principles of programming languages},
 year = {1998},
 isbn = {0-89791-979-3},
 pages = {355--364},
 location = {San Diego, California, United States},
 doi = {http://doi.acm.org/10.1145/268946.268975},
 publisher = {ACM Press},
 }


@article{609237,
 author = {Steve Zdancewic and Andrew C. Myers},
 title = {Secure Information Flow via Linear Continuations},
 journal = {Higher Order Symbol. Comput.},
 volume = {15},
 number = {2-3},
 year = {2002},
 issn = {1388-3690},
 pages = {209--234},
 publisher = {Kluwer Academic Publishers},
 }

@inproceedings{292555,
 author = {Mart\&\#237;n Abadi and Anindya Banerjee and Nevin Heintze and Jon G. Riecke},
 title = {A core calculus of dependency},
 booktitle = {Proceedings of the 26th ACM SIGPLAN-SIGACT symposium on Principles of programming languages},
 year = {1999},
 isbn = {1-58113-095-3},
 pages = {147--160},
 location = {San Antonio, Texas, United States},
 doi = {http://doi.acm.org/10.1145/292540.292555},
 publisher = {ACM Press},
 }
@inproceedings{263712,
 author = {George C. Necula},
 title = {Proof-carrying code},
 booktitle = {Proceedings of the 24th ACM SIGPLAN-SIGACT symposium on Principles of programming languages},
 year = {1997},
 isbn = {0-89791-853-3},
 pages = {106--119},
 location = {Paris, France},
 doi = {http://doi.acm.org/10.1145/263699.263712},
 publisher = {ACM Press},
 }
@inproceedings{788923,
 author = {G. C. Necula and P. Lee},
 title = {Efficient Representation and Validation of Proofs},
 booktitle = {Proceedings of the 13th Annual IEEE Symposium on Logic in Computer Science},
 year = {1998},
 isbn = {0-8186-8506-9},
 pages = {93},
 publisher = {IEEE Computer Society},
 }
%
%
@misc{ neil-rifle,
author = "Neil Vachharajani and Matthew J. Bridges and Jonathan Chang and Ram Rangan and Guilherme Ottoni and Jason A. Blome and George A. Reis and Manish Vachharajani and David I. August",
title = "RIFLE: An Architectural Framework for User-Centric Information-Flow Security ",
booktitle = "37th International Symposium on Microarchitecture", pages = "", month = "Dec", year = "2004", address = "Portland, Oregon",
url = "citeseer.ist.psu.edu/711861.html" }

@inproceedings{605429,
 author = {Emmett Witchel and Josh Cates and Krste Asanovi\&\#263;},
 title = {Mondrian memory protection},
 booktitle = {Proceedings of the 10th international conference on Architectural support for programming languages and operating systems},
 year = {2002},
 isbn = {1-58113-574-2},
 pages = {304--316},
 location = {San Jose, California},
 doi = {http://doi.acm.org/10.1145/605397.605429},
 publisher = {ACM Press},
 }

@INPROCEEDINGS{cowan:03b, ANNOTE = {PaX to Cowan: {\newline}Cowan to PaX: {\newline}Pax to Cowan: }, AUTHOR = {C. Cowan and S. Beattie and J. Johansen and P. Wagle}, BOOKTITLE = {Proc. of the 12th {USENIX} Security Symposium}, MONTH = {Aug}, TITLE = {{PointGuard$^{\textrm{TM}}$}: {Protecting} Pointers from Buffer Overflow Vulnerabilities}, URL = {<http://www.usenix.org/events/sec03/tech/full_papers/cowan/cowan.pdf>}, YEAR = {2003} }
%
%
%

@article{flugel2001,
    author = "S. Flugel and F. Grassert and M. Grothmann and M. Haase and P. Nimsch and H. Ploog and D. Timmermann and A. Wassatsch",
    title = "A Design Flow for 12.8 GBit/s Triple DES using dynamic logic and standard synthesis tools",
    journal = "Synopsys User Group (SNUG) Europe, S. E3.2.",
    pages = "1-8",
    year = 2001
    }
%
%
%
@inproceedings{ processor-speedarea,
  author = "Alireza Hodjat And Ingrid Verbauwhede",
  title = {{Speed-Area Trade-off for 10 to 100 Gbits/s}},
  booktitle = "37th Asilomar Conference on Signals, Systems, and Computer, Nov. 2003",
  url = "citeseer.ist.psu.edu/661160.html" }
%
%
%
@inproceedings{ and-minimum,
  author = "Alireza Hodjat and Ingrid Verbauwhede",
  title = {{Minimum Area Cost for a 30 to 70 Gbits/s AES Processor}},
  booktitle = "IEEE Computer Society Annual Symposium on VLSI, pp. 498-502",
  url = "citeseer.ist.psu.edu/667338.html" }
%
%
%
@inproceedings{752699,
 author = {M. McLoone and J. V. McCanny},
 title = {{High Performance Single-Chip FPGA Rijndael Algorithm Implementations}},
 booktitle = {Proceedings of the Third International Workshop on Cryptographic Hardware and Embedded Systems},
 year = {2001},
 isbn = {3-540-42521-7},
 pages = {65--76},
 publisher = {Springer-Verlag},
 }
%
%
%
@inproceedings{717008,
 author = {Akashi Satoh and Sumio Morioka and Kohji Takano and Seiji Munetoh},
 title = {{A Compact Rijndael Hardware Architecture with S-Box Optimization}},
 booktitle = {Proceedings of the 7th International Conference on the Theory and Application of Cryptology and Information Security},
 year = {2001},
 isbn = {3-540-42987-5},
 pages = {239--254},
 publisher = {Springer-Verlag},
 }
%
%
%
@article{ actel,
    author = "Actel",
    title = "Design Security in Nonvolatile Flash and Antifuse FPGAs",
    journal = "www.actel.com/documents/DesignSecurity.pdf",
    pages = "",
    year = ""
    }
%
%
%
%
@article{ rogers2004,
    author = "Brian Rogers and Yan Solihin and Milos Prvulovic",
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 title = {{Die Stacking (3D) Microarchitecture}},
 booktitle = {Proceedings of the 39th International Symposium on Microarchitecture},
 year = {2006},
}

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 year = {2002},
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 year = {2003},
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 pages = {878-883},
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@inproceedings{riley:itc05,
 author = {M. Riley and L. Bushard and N. Chelstrom and N. Kiryu and S. Ferguson},
 title = {{Testability Features of the First-Generation Cell Processor}},
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 year = {2005},
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@inproceedings{tan:itc06,
 author = {P. Tan and T. Le and K.-H. Ng and P. Mantri and J. Westfall},
 title = {{Testing of UltraSPARC T1 Microprocessor and Its Challenges}},
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 year = {2006},
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@inproceedings{mclaurin:itc06,
 author = {T. McLaurin},
 title = {{The Challenge of Testing the ARM Cortex-A8$^{TM}$ Microprocessor Core}},
 booktitle = {Proceedings of the International Test Conference},
 year = {2006},
}

@inproceedings{parvathala:itc02,
 author = {P. Parvathala and K. Maneparambil and W. Lindsay},
 title = {{FRITS - A Microprocessor Functional BIST Method}},
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 year = {2002},
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@unpublished{samsung:8layer,
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 title = {http://www.samsung.com/PressCenter/PressRelease/\newline{}PressRelease.asp?seq=20060413\_0000246668},
 year = {2006},
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@unpublished{tezzaron,
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 year = {2006},
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@inproceedings{bhansali:spie04,
 author = {S. Bhansali and G. Chapmann and E. Friedman and Y. Ismail and P. Mukund and D. Tebbe and V. Jain},
 title = {{3-D Heterogeneous Sensor System on a Chip for Defense and Security Applications}},
 booktitle = {Proceedings of SPIE Volume 5417},
 year = {2004},
 pages = {413-424},
}

@inproceedings{pavlidis:isoc06,
 author = {V. Pavlidis and E. Friedman},
 title = {{3-D Topologies for Networks-on-Chip}},
 booktitle = {International SOC Conference},
 year = {2006},
 pages = {285-288},
}

@article{nunomura:micro97,
 author = {Y. Nunomura and N. Manijikian},
 title = {{M32R/D-Integrating DRAM and Microprocessor}},
 journal = {IEEE MICRO},
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 year = {1997},
 pages = {40-48},
 }

@misc{keithley03,
 author = {O. Weeden},
 title = {{Probe Card Tutorial, http://www.keithley.com/data?asset=13263}},
 organization = {Keithley Instruments Inc.},
 year = {2003},
 URL = {http://www.keithley.com/data?asset=13263},
}

@misc{josh06,
 author = {Personal Communication with Josh Fryman},
 title = {Intel Corporation},
 year = {2006},
}

misc{lim:clockpaper,
 author = {Personal Communtication with Sung-Kyu Lim},
 title = {Georgia Institute of Technology},
 year = {2007},
}

@inproceedings{lim:clockpaper,
 author = {Mohit Pathak and Sung-Kyu Lim},
 title = {{Thermal-aware Steiner Routing for 3D Stacked ICs}},
 booktitle = {To appear in the IEEE International Conference on Computer-Aided Design},
 year = {2007},
}


@inproceedings{kiran:hpca07,
 author = {Kiran Puttaswamy and Gabriel H. Loh},
 title = {{Thermal Herding: Microarchitecture Techniques for Controlling Hotspots in High-Performance 3D-Integrated Processors}},
 booktitle = {Proceedings of the 13th International Symposium on High-Performance Computer Architecture},
 pages = {193--204},
 year = {2007},
}


@inproceedings{madan:micro40,
author = {Niti Madan and Rajeev Balasubramonian},
title = {{Leveraging 3D Technology for Improved Reliability}},
booktitle = {Proceedings of the 40th International Symposium on Microarchitecture},
year = {2007}
}

@inproceedings{,
 author = {},
 title = {},
 booktitle = {},
 year = {},
 pages = {},
}
